| # RISCV32_MIV implementation | |
| # Copyright (c) 2018 Antmicro <www.antmicro.com> | |
| # SPDX-License-Identifier: Apache-2.0 | |
| config SOC_SERIES_MIV | |
| bool "Microchip Mi-V implementation" | |
| select SOC_FAMILY_MICROCHIP_MIV | |
| select RISCV | |
| select RISCV_PRIVILEGED | |
| select RISCV_HAS_PLIC | |
| help | |
| Enable support for Microchip Mi-V |