blob: 4bba5f13ecced27110b840e263e2b2d83094b6a6 [file] [log] [blame]
/*
* Copyright (c) 2017 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/l4/stm32l475.dtsi>
/ {
soc {
compatible = "st,stm32l496", "st,stm32l4", "simple-bus";
clocks {
clk_hsi48: clk-hsi48 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(48)>;
status = "disabled";
};
};
rng: rng@50060800 {
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
};
i2c4: i2c@40008400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40008400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>;
interrupts = <83 0>, <84 0>;
interrupt-names = "event", "error";
status = "disabled";
};
pinctrl: pin-controller@48000000 {
reg = <0x48000000 0x2400>;
gpioi: gpio@48002000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48002000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000100>;
};
};
can2: can@40006800 {
compatible = "st,stm32-bxcan";
reg = <0x40006800 0x400>;
interrupts = <86 0>, <87 0>, <88 0>, <89 0>;
interrupt-names = "TX", "RX0", "RX1", "SCE";
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>; //RCC_APB1ENR1_CAN2EN
master-can-reg = <0x40006400>;
status = "disabled";
sample-point = <875>;
};
aes: aes@50060000 {
compatible = "st,stm32-aes";
reg = <0x50060000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00010000>;
interrupts = <79 0>;
interrupt-names = "aes";
status = "disabled";
};
usbotg_fs: otgfs@50000000 {
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
};
sdmmc1: sdmmc@40012800 {
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000400>,
<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
};
};
die_temp: dietemp {
ts-cal2-temp = <130>;
};
smbus4: smbus4 {
compatible = "st,stm32-smbus";
#address-cells = <1>;
#size-cells = <0>;
i2c = <&i2c4>;
status = "disabled";
};
};