| # SPDX-License-Identifier: Apache-2.0 |
| |
| CONFIG_SOC_SERIES_STM32L4X=y |
| CONFIG_SOC_STM32L4S5XX=y |
| # 80MHz system clock |
| CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 |
| |
| # enable uart driver |
| CONFIG_SERIAL=y |
| |
| # enable pinmux |
| CONFIG_PINMUX=y |
| |
| # enable GPIO |
| CONFIG_GPIO=y |
| |
| # clock configuration |
| CONFIG_CLOCK_CONTROL=y |
| # SYSCLK selection |
| CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y |
| |
| # Use HSI (16MHz) to feed into PLL |
| CONFIG_CLOCK_STM32_PLL_SRC_HSI=y |
| |
| # PLL configuration |
| CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4 |
| CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2 |
| CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2 |
| CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2 |
| |
| # Produce 80MHz clock at PLLCLK output |
| CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=40 |
| |
| # Produce Max (80MHz) HCLK |
| CONFIG_CLOCK_STM32_AHB_PRESCALER=1 |
| |
| # Produce Max (80MHz) APB1 clocks and APB2 clocks |
| CONFIG_CLOCK_STM32_APB1_PRESCALER=1 |
| CONFIG_CLOCK_STM32_APB2_PRESCALER=1 |
| |
| # console |
| CONFIG_CONSOLE=y |
| CONFIG_UART_CONSOLE=y |
