| /* |
| * Copyright (c) 2021, NXP |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <mem.h> |
| #include <arm/armv7-m.dtsi> |
| #include <dt-bindings/clock/imx_ccm_rev2.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-m7"; |
| reg = <0>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| mpu: mpu@e000ed90 { |
| compatible = "arm,armv7m-mpu"; |
| reg = <0xe000ed90 0x40>; |
| arm,num-mpu-regions = <16>; |
| }; |
| }; |
| cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-m4f"; |
| reg = <1>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| mpu: mpu@e000ed90 { |
| compatible = "arm,armv7m-mpu"; |
| reg = <0xe000ed90 0x40>; |
| arm,num-mpu-regions = <16>; |
| }; |
| }; |
| }; |
| |
| soc { |
| flexspi1: spi@400cc000 { |
| compatible = "nxp,imx-flexspi"; |
| reg = <0x400cc000 0x4000>; |
| interrupts = <130 0>; |
| label = "FLEXSPI1"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| flexspi2: spi@400d0000 { |
| compatible = "nxp,imx-flexspi"; |
| reg = <0x400d0000 0x4000>; |
| interrupts = <131 0>; |
| label = "FLEXSPI2"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| semc: semc0@400d4000 { |
| compatible = "nxp,imx-semc"; |
| reg = <0x400d4000 0x4000>; |
| interrupts = <132 0>; |
| label = "SEMC0"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| }; |
| |
| gpt1: gpt@400ec000 { |
| compatible = "nxp,imx-gpt"; |
| reg = <0x400ec000 0x4000>; |
| interrupts = <119 0>; |
| gptfreq = <24000000>; |
| clocks = <&ccm IMX_CCM_GPT_CLK 0x40 0>; |
| label = "GPT1"; |
| }; |
| |
| gpt2: gpt@400f0000 { |
| compatible = "nxp,imx-gpt"; |
| reg = <0x400f0000 0x4000>; |
| interrupts = <120 0>; |
| gptfreq = <24000000>; |
| clocks = <&ccm IMX_CCM_GPT_CLK 0x41 0>; |
| label = "GPT2"; |
| }; |
| |
| gpt3: gpt@400f4000 { |
| compatible = "nxp,imx-gpt"; |
| reg = <0x400f4000 0x4000>; |
| interrupts = <121 0>; |
| gptfreq = <24000000>; |
| clocks = <&ccm IMX_CCM_GPT_CLK 0x42 0>; |
| label = "GPT3"; |
| }; |
| |
| gpt4: gpt@400f8000 { |
| compatible = "nxp,imx-gpt"; |
| reg = <0x400f8000 0x4000>; |
| interrupts = <122 0>; |
| gptfreq = <24000000>; |
| clocks = <&ccm IMX_CCM_GPT_CLK 0x43 0>; |
| label = "GPT4"; |
| }; |
| |
| gpt5: gpt@400fc000 { |
| compatible = "nxp,imx-gpt"; |
| reg = <0x400fc000 0x4000>; |
| interrupts = <123 0>; |
| gptfreq = <24000000>; |
| clocks = <&ccm IMX_CCM_GPT_CLK 0x44 0>; |
| label = "GPT5"; |
| }; |
| |
| gpt6: gpt@40100000 { |
| compatible = "nxp,imx-gpt"; |
| reg = <0x40100000 0x4000>; |
| interrupts = <124 0>; |
| gptfreq = <24000000>; |
| clocks = <&ccm IMX_CCM_GPT_CLK 0x45 0>; |
| label = "GPT6"; |
| }; |
| |
| ccm: ccm@40cc0000 { |
| compatible = "nxp,imx-ccm-rev2"; |
| reg = <0x40cc0000 0x4000>; |
| label = "CCM"; |
| |
| #clock-cells = <3>; |
| }; |
| |
| gpio1: gpio@4012c000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x4012c000 0x4000>; |
| interrupts = <100 0>, <101 0>; |
| label = "GPIO_1"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio2: gpio@40130000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40130000 0x4000>; |
| interrupts = <102 0>, <103 0>; |
| label = "GPIO_2"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio3: gpio@40134000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40134000 0x4000>; |
| interrupts = <104 0>, <105 0>; |
| label = "GPIO_3"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio4: gpio@40138000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40138000 0x4000>; |
| interrupts = <106 0>, <107 0>; |
| label = "GPIO_4"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio5: gpio@4013c000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x4013c000 0x4000>; |
| interrupts = <108 0>, <109 0>; |
| label = "GPIO_5"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio6: gpio@40140000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40140000 0x4000>; |
| label = "GPIO_6"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio9: gpio@40c64000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40c64000 0x4000>; |
| label = "GPIO_9"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio11: gpio@40c6c000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40c6c000 0x4000>; |
| label = "GPIO_11"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpio13: gpio@40ca0000 { |
| compatible = "nxp,imx-gpio"; |
| reg = <0x40ca0000 0x4000>; |
| interrupts = <93 0>; |
| label = "GPIO_13"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| lpi2c1: i2c@40104000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40104000 0x4000>; |
| interrupts = <32 0>; |
| clocks = <&ccm IMX_CCM_LPI2C1_CLK 0x70 6>; |
| label = "I2C_1"; |
| status = "disabled"; |
| }; |
| |
| lpi2c2: i2c@40108000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40108000 0x4000>; |
| interrupts = <33 0>; |
| clocks = <&ccm IMX_CCM_LPI2C2_CLK 0x70 8>; |
| label = "I2C_2"; |
| status = "disabled"; |
| }; |
| |
| lpi2c3: i2c@4010c000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x4010c000 0x4000>; |
| interrupts = <34 0>; |
| clocks = <&ccm IMX_CCM_LPI2C3_CLK 0x70 10>; |
| label = "I2C_3"; |
| status = "disabled"; |
| }; |
| |
| lpi2c4: i2c@40110000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40110000 0x4000>; |
| interrupts = <35 0>; |
| clocks = <&ccm IMX_CCM_LPI2C4_CLK 0x80 24>; |
| label = "I2C_4"; |
| status = "disabled"; |
| }; |
| |
| lpi2c5: i2c@40c34000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40c34000 0x4000>; |
| interrupts = <36 0>; |
| clocks = <&ccm IMX_CCM_LPI2C5_CLK 0x80 24>; |
| label = "I2C_5"; |
| status = "disabled"; |
| }; |
| |
| lpi2c6: i2c@40c38000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40c38000 0x4000>; |
| interrupts = <37 0>; |
| clocks = <&ccm IMX_CCM_LPI2C6_CLK 0x80 24>; |
| label = "I2C_6"; |
| status = "disabled"; |
| }; |
| |
| iomuxc: iomuxc@400e8000 { |
| reg = <0x400e8000 0x4000>; |
| label = "PINMUX_0"; |
| }; |
| |
| lcdif: display-controller@40804000 { |
| compatible = "fsl,imx6sx-lcdif"; |
| reg = <0x40804000 0x4000>; |
| interrupts = <54 0>; |
| label = "ELCDIF_1"; |
| status = "disabled"; |
| }; |
| |
| lpspi1: spi@40114000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40114000 0x4000>; |
| interrupts = <38 3>; |
| label = "SPI_1"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI1_CLK 0x6c 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| lpspi2: spi@40118000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40118000 0x4000>; |
| interrupts = <39 3>; |
| label = "SPI_2"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI2_CLK 0x6c 2>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| lpspi3: spi@4011c000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x4011c000 0x4000>; |
| interrupts = <40 3>; |
| label = "SPI_3"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI3_CLK 0x6c 4>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| lpspi4: spi@40120000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40120000 0x4000>; |
| interrupts = <41 3>; |
| label = "SPI_4"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI4_CLK 0x6c 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| lpspi5: spi@40c2c000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40c2c000 0x4000>; |
| interrupts = <42 3>; |
| label = "SPI_5"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI5_CLK 0x6c 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| lpspi6: spi@40c30000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x40c30000 0x4000>; |
| interrupts = <43 3>; |
| label = "SPI_6"; |
| status = "disabled"; |
| clocks = <&ccm IMX_CCM_LPSPI6_CLK 0x6c 6>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| lpuart1: uart@4007c000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4007c000 0x4000>; |
| interrupts = <20 0>; |
| clocks = <&ccm IMX_CCM_LPUART1_CLK 0x7c 24>; |
| label = "UART_1"; |
| status = "disabled"; |
| }; |
| |
| lpuart2: uart@40080000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40080000 0x4000>; |
| interrupts = <21 0>; |
| clocks = <&ccm IMX_CCM_LPUART2_CLK 0x68 28>; |
| label = "UART_2"; |
| status = "disabled"; |
| }; |
| |
| lpuart3: uart@40084000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40084000 0x4000>; |
| interrupts = <22 0>; |
| clocks = <&ccm IMX_CCM_LPUART3_CLK 0x68 12>; |
| label = "UART_3"; |
| status = "disabled"; |
| }; |
| |
| lpuart4: uart@40088000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40088000 0x4000>; |
| interrupts = <23 0>; |
| clocks = <&ccm IMX_CCM_LPUART4_CLK 0x6c 24>; |
| label = "UART_4"; |
| status = "disabled"; |
| }; |
| |
| lpuart5: uart@4008c000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4008c000 0x4000>; |
| interrupts = <24 0>; |
| clocks = <&ccm IMX_CCM_LPUART5_CLK 0x74 2>; |
| label = "UART_5"; |
| status = "disabled"; |
| }; |
| |
| lpuart6: uart@40090000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40090000 0x4000>; |
| interrupts = <25 0>; |
| clocks = <&ccm IMX_CCM_LPUART6_CLK 0x74 6>; |
| label = "UART_6"; |
| status = "disabled"; |
| }; |
| |
| lpuart7: uart@40094000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40094000 0x4000>; |
| interrupts = <26 0>; |
| clocks = <&ccm IMX_CCM_LPUART7_CLK 0x7c 26>; |
| label = "UART_7"; |
| status = "disabled"; |
| }; |
| |
| lpuart8: uart@40098000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40098000 0x4000>; |
| interrupts = <27 0>; |
| clocks = <&ccm IMX_CCM_LPUART8_CLK 0x80 14>; |
| label = "UART_8"; |
| status = "disabled"; |
| }; |
| |
| lpuart9: uart@4009c000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4009c000 0x4000>; |
| interrupts = <28 0>; |
| clocks = <&ccm IMX_CCM_LPUART9_CLK 0x80 14>; |
| label = "UART_9"; |
| status = "disabled"; |
| }; |
| |
| lpuart10: uart@400a0000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x400a0000 0x4000>; |
| interrupts = <29 0>; |
| clocks = <&ccm IMX_CCM_LPUART10_CLK 0x80 14>; |
| label = "UART_10"; |
| status = "disabled"; |
| }; |
| |
| lpuart11: uart@40c24000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40c24000 0x4000>; |
| interrupts = <30 0>; |
| clocks = <&ccm IMX_CCM_LPUART11_CLK 0x80 14>; |
| label = "UART_11"; |
| status = "disabled"; |
| }; |
| |
| lpuart12: uart@40098000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x40098000 0x4000>; |
| interrupts = <31 0>; |
| clocks = <&ccm IMX_CCM_LPUART12_CLK 0x80 14>; |
| label = "UART_8"; |
| status = "disabled"; |
| }; |
| |
| flexpwm1: flexpwm@4018c000 { |
| compatible = "nxp,flexpwm"; |
| reg = <0x4018c000 0x4000>; |
| interrupts = <129 0>; |
| |
| flexpwm1_pwm0: pwm0 { |
| compatible = "nxp,imx-pwm"; |
| index = <0>; |
| label = "FLEXPWM1_PWM0"; |
| interrupts = <125 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm1_pwm1: pwm1 { |
| compatible = "nxp,imx-pwm"; |
| index = <1>; |
| label = "FLEXPWM1_PWM1"; |
| interrupts = <126 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm1_pwm2: pwm2 { |
| compatible = "nxp,imx-pwm"; |
| index = <2>; |
| label = "FLEXPWM1_PWM2"; |
| interrupts = <127 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm1_pwm3: pwm3 { |
| compatible = "nxp,imx-pwm"; |
| index = <3>; |
| label = "FLEXPWM1_PWM3"; |
| interrupts = <128 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| }; |
| |
| flexpwm2: flexpwm@40190000 { |
| compatible = "nxp,flexpwm"; |
| reg = <0x40190000 0x4000>; |
| interrupts = <181 0>; |
| |
| flexpwm2_pwm0: pwm0 { |
| compatible = "nxp,imx-pwm"; |
| index = <0>; |
| label = "FLEXPWM2_PWM0"; |
| interrupts = <177 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm2_pwm1: pwm1 { |
| compatible = "nxp,imx-pwm"; |
| index = <1>; |
| label = "FLEXPWM2_PWM1"; |
| interrupts = <178 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm2_pwm2: pwm2 { |
| compatible = "nxp,imx-pwm"; |
| index = <2>; |
| label = "FLEXPWM2_PWM2"; |
| interrupts = <179 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm2_pwm3: pwm3 { |
| compatible = "nxp,imx-pwm"; |
| index = <3>; |
| label = "FLEXPWM2_PWM3"; |
| interrupts = <180 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| }; |
| |
| flexpwm3: flexpwm@40194000 { |
| compatible = "nxp,flexpwm"; |
| reg = <0x40194000 0x4000>; |
| interrupts = <186 0>; |
| |
| flexpwm3_pwm0: pwm0 { |
| compatible = "nxp,imx-pwm"; |
| index = <0>; |
| label = "FLEXPWM3_PWM0"; |
| interrupts = <182 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm3_pwm1: pwm1 { |
| compatible = "nxp,imx-pwm"; |
| index = <1>; |
| label = "FLEXPWM3_PWM1"; |
| interrupts = <183 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm3_pwm2: pwm2 { |
| compatible = "nxp,imx-pwm"; |
| index = <2>; |
| label = "FLEXPWM3_PWM2"; |
| interrupts = <184 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm3_pwm3: pwm3 { |
| compatible = "nxp,imx-pwm"; |
| index = <3>; |
| label = "FLEXPWM3_PWM3"; |
| interrupts = <185 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| }; |
| |
| flexpwm4: flexpwm@40198000 { |
| compatible = "nxp,flexpwm"; |
| reg = <0x40198000 0x4000>; |
| interrupts = <191 0>; |
| |
| flexpwm4_pwm0: pwm0 { |
| compatible = "nxp,imx-pwm"; |
| index = <0>; |
| label = "FLEXPWM4_PWM0"; |
| interrupts = <187 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm4_pwm1: pwm1 { |
| compatible = "nxp,imx-pwm"; |
| index = <1>; |
| label = "FLEXPWM4_PWM1"; |
| interrupts = <188 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm4_pwm2: pwm2 { |
| compatible = "nxp,imx-pwm"; |
| index = <2>; |
| label = "FLEXPWM4_PWM2"; |
| interrupts = <189 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| flexpwm4_pwm3: pwm3 { |
| compatible = "nxp,imx-pwm"; |
| index = <3>; |
| label = "FLEXPWM4_PWM3"; |
| interrupts = <190 0>; |
| #pwm-cells = <1>; |
| status = "disabled"; |
| }; |
| }; |
| |
| enet: ethernet@40424000 { |
| compatible = "nxp,kinetis-ethernet"; |
| reg = <0x40424000 0x628>; |
| interrupts = <137 0>; |
| interrupt-names = "COMMON"; |
| status = "disabled"; |
| label = "ETH_0"; |
| ptp { |
| compatible = "nxp,kinetis-ptp"; |
| status = "disabled"; |
| interrupts = <138 0>; |
| interrupt-names = "IEEE1588_TMR"; |
| }; |
| }; |
| |
| usb1: usbd@40430000 { |
| compatible = "nxp,mcux-usbd"; |
| reg = <0x40430000 0x200>; |
| interrupts = <136 1>; |
| interrupt-names = "usb_otg"; |
| num-bidir-endpoints = <8>; |
| maximum-speed = "full-speed"; |
| status = "disabled"; |
| label = "USBD_1"; |
| }; |
| |
| usb2: usbd@4042c000 { |
| compatible = "nxp,mcux-usbd"; |
| reg = <0x4042c000 0x200>; |
| interrupts = <135 1>; |
| interrupt-names = "usb_otg"; |
| num-bidir-endpoints = <8>; |
| maximum-speed = "full-speed"; |
| status = "disabled"; |
| label = "USBD_2"; |
| }; |
| |
| usdhc1: usdhc@40418000 { |
| compatible = "nxp,imx-usdhc"; |
| reg = <0x40418000 0x4000>; |
| status = "disabled"; |
| interrupts = <133 0>; |
| clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>; |
| label = "USDHC_1"; |
| }; |
| |
| usdhc2: usdhc@4041c000 { |
| compatible = "nxp,imx-usdhc"; |
| reg = <0x4041c000 0x4000>; |
| status = "disabled"; |
| interrupts = <134 0>; |
| clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>; |
| label = "USDHC_2"; |
| }; |
| |
| csi: csi@40800000 { |
| compatible = "nxp,imx-csi"; |
| reg = <0x40800000 0x4000>; |
| interrupts = <56 1>; |
| status = "disabled"; |
| label = "CSI"; |
| }; |
| |
| flexcan1: can@40c40000 { |
| compatible = "nxp,kinetis-flexcan"; |
| reg = <0x40c40000 0x1000>; |
| interrupts = <44 0>, <45 0>; |
| interrupt-names = "common", "error"; |
| clocks = <&ccm IMX_CCM_CAN1_CLK 0x68 14>; |
| clk-source = <2>; |
| label = "CAN_1"; |
| sjw = <1>; |
| prop-seg = <1>; |
| phase-seg1 = <3>; |
| phase-seg2 = <2>; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| flexcan2: can@400c8000 { |
| compatible = "nxp,kinetis-flexcan"; |
| reg = <0x400c8000 0x1000>; |
| interrupts = <46 0>, <47 0>; |
| interrupt-names = "common", "error"; |
| clocks = <&ccm IMX_CCM_CAN2_CLK 0x68 18>; |
| clk-source = <2>; |
| label = "CAN_2"; |
| sjw = <1>; |
| prop-seg = <1>; |
| phase-seg1 = <3>; |
| phase-seg2 = <2>; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| flexcan3: can@40c3c000 { |
| compatible = "nxp,kinetis-flexcan"; |
| reg = <0x40c3c000 0x1000>; |
| interrupts = <48 0>, <49 0>; |
| interrupt-names = "common", "error"; |
| clocks = <&ccm IMX_CCM_CAN3_CLK 0x84 6>; |
| clk-source = <2>; |
| label = "CAN_3"; |
| sjw = <1>; |
| prop-seg = <1>; |
| phase-seg1 = <3>; |
| phase-seg2 = <2>; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| wdog1: wdog@40038000 { |
| compatible = "nxp,imx-wdog"; |
| reg = <0x40038000 0xA>; |
| status = "disabled"; |
| interrupts = <112 0>; |
| label = "WDOG1"; |
| }; |
| |
| wdog2: wdog@40034000 { |
| compatible = "nxp,imx-wdog"; |
| reg = <0x40034000 0xA>; |
| status = "disabled"; |
| interrupts = <65 0>; |
| label = "WDOG2"; |
| }; |
| |
| ocram: ocram@20200000 { |
| compatible = "mmio-sram"; |
| reg = <0x20200000 DT_SIZE_K(256)>; |
| }; |
| |
| ocram1: ocram@20240000 { |
| compatible = "mmio-sram"; |
| reg = <0x20240000 DT_SIZE_K(512)>; |
| }; |
| |
| ocram2: ocram@202c0000 { |
| compatible = "mmio-sram"; |
| reg = <0x202c0000 DT_SIZE_K(512)>; |
| }; |
| |
| lpadc0: lpadc@40050000 { |
| compatible = "nxp,lpc-lpadc"; |
| reg = <0x40050000 0x304>; |
| interrupts = <88 0>; |
| status = "disabled"; |
| clk-divider = <8>; |
| clk-source = <0>; |
| voltage-ref= <2>; |
| calibration-average = <128>; |
| power-level = <1>; |
| label = "LPADC_0"; |
| offset-value-a = <10>; |
| offset-value-b = <10>; |
| #io-channel-cells = <1>; |
| }; |
| |
| lpadc1: lpadc@40054000 { |
| compatible = "nxp,lpc-lpadc"; |
| reg = <0x40054000 0x304>; |
| interrupts = <89 0>; |
| status = "disabled"; |
| clk-divider = <8>; |
| clk-source = <0>; |
| voltage-ref= <2>; |
| calibration-average = <128>; |
| power-level = <1>; |
| label = "LPADC_1"; |
| offset-value-a = <10>; |
| offset-value-b = <10>; |
| #io-channel-cells = <1>; |
| }; |
| |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <4>; |
| }; |
