Krivorot Oleg | 1d55d92 | 2021-06-23 12:34:41 +0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2020 Teslabs Engineering S.L. |
| 3 | * Copyright (c) 2021 Krivorot Oleg <krivorot.oleg@gmail.com> |
Konstantinos Papadopoulos | 5e519fe | 2022-03-16 01:08:10 +0200 | [diff] [blame] | 4 | * Copyright (c) 2022 Konstantinos Papadopoulos <kostas.papadopulos@gmail.com> |
Krivorot Oleg | 1d55d92 | 2021-06-23 12:34:41 +0300 | [diff] [blame] | 5 | * |
| 6 | * SPDX-License-Identifier: Apache-2.0 |
| 7 | */ |
| 8 | |
| 9 | #include "display_ili9341.h" |
| 10 | #include "display_ili9xxx.h" |
| 11 | |
Gerard Marull-Paretas | fb60aab | 2022-05-06 10:25:46 +0200 | [diff] [blame] | 12 | #include <zephyr/logging/log.h> |
Krivorot Oleg | 1d55d92 | 2021-06-23 12:34:41 +0300 | [diff] [blame] | 13 | LOG_MODULE_REGISTER(display_ili9341, CONFIG_DISPLAY_LOG_LEVEL); |
| 14 | |
| 15 | int ili9341_regs_init(const struct device *dev) |
| 16 | { |
| 17 | const struct ili9xxx_config *config = dev->config; |
| 18 | const struct ili9341_regs *regs = config->regs; |
| 19 | |
| 20 | int r; |
| 21 | |
| 22 | LOG_HEXDUMP_DBG(regs->pwseqctrl, ILI9341_PWSEQCTRL_LEN, "PWSEQCTRL"); |
| 23 | r = ili9xxx_transmit(dev, ILI9341_PWSEQCTRL, regs->pwseqctrl, ILI9341_PWSEQCTRL_LEN); |
| 24 | if (r < 0) { |
| 25 | return r; |
| 26 | } |
| 27 | |
| 28 | LOG_HEXDUMP_DBG(regs->timctrla, ILI9341_TIMCTRLA_LEN, "TIMCTRLA"); |
| 29 | r = ili9xxx_transmit(dev, ILI9341_TIMCTRLA, regs->timctrla, ILI9341_TIMCTRLA_LEN); |
| 30 | if (r < 0) { |
| 31 | return r; |
| 32 | } |
| 33 | |
| 34 | LOG_HEXDUMP_DBG(regs->timctrlb, ILI9341_TIMCTRLB_LEN, "TIMCTRLB"); |
| 35 | r = ili9xxx_transmit(dev, ILI9341_TIMCTRLB, regs->timctrlb, ILI9341_TIMCTRLB_LEN); |
| 36 | if (r < 0) { |
| 37 | return r; |
| 38 | } |
| 39 | |
| 40 | LOG_HEXDUMP_DBG(regs->pumpratioctrl, ILI9341_PUMPRATIOCTRL_LEN, "PUMPRATIOCTRL"); |
| 41 | r = ili9xxx_transmit(dev, ILI9341_PUMPRATIOCTRL, regs->pumpratioctrl, |
| 42 | ILI9341_PUMPRATIOCTRL_LEN); |
| 43 | if (r < 0) { |
| 44 | return r; |
| 45 | } |
| 46 | |
| 47 | LOG_HEXDUMP_DBG(regs->pwctrla, ILI9341_PWCTRLA_LEN, "PWCTRLA"); |
| 48 | r = ili9xxx_transmit(dev, ILI9341_PWCTRLA, regs->pwctrla, ILI9341_PWCTRLA_LEN); |
| 49 | if (r < 0) { |
| 50 | return r; |
| 51 | } |
| 52 | |
| 53 | LOG_HEXDUMP_DBG(regs->pwctrlb, ILI9341_PWCTRLB_LEN, "PWCTRLB"); |
| 54 | r = ili9xxx_transmit(dev, ILI9341_PWCTRLB, regs->pwctrlb, ILI9341_PWCTRLB_LEN); |
| 55 | if (r < 0) { |
| 56 | return r; |
| 57 | } |
| 58 | |
| 59 | LOG_HEXDUMP_DBG(regs->gamset, ILI9341_GAMSET_LEN, "GAMSET"); |
| 60 | r = ili9xxx_transmit(dev, ILI9341_GAMSET, regs->gamset, ILI9341_GAMSET_LEN); |
| 61 | if (r < 0) { |
| 62 | return r; |
| 63 | } |
| 64 | |
| 65 | LOG_HEXDUMP_DBG(regs->frmctr1, ILI9341_FRMCTR1_LEN, "FRMCTR1"); |
| 66 | r = ili9xxx_transmit(dev, ILI9341_FRMCTR1, regs->frmctr1, ILI9341_FRMCTR1_LEN); |
| 67 | if (r < 0) { |
| 68 | return r; |
| 69 | } |
| 70 | |
| 71 | LOG_HEXDUMP_DBG(regs->disctrl, ILI9341_DISCTRL_LEN, "DISCTRL"); |
| 72 | r = ili9xxx_transmit(dev, ILI9341_DISCTRL, regs->disctrl, ILI9341_DISCTRL_LEN); |
| 73 | if (r < 0) { |
| 74 | return r; |
| 75 | } |
| 76 | |
| 77 | LOG_HEXDUMP_DBG(regs->pwctrl1, ILI9341_PWCTRL1_LEN, "PWCTRL1"); |
| 78 | r = ili9xxx_transmit(dev, ILI9341_PWCTRL1, regs->pwctrl1, ILI9341_PWCTRL1_LEN); |
| 79 | if (r < 0) { |
| 80 | return r; |
| 81 | } |
| 82 | |
| 83 | LOG_HEXDUMP_DBG(regs->pwctrl2, ILI9341_PWCTRL2_LEN, "PWCTRL2"); |
| 84 | r = ili9xxx_transmit(dev, ILI9341_PWCTRL2, regs->pwctrl2, ILI9341_PWCTRL2_LEN); |
| 85 | if (r < 0) { |
| 86 | return r; |
| 87 | } |
| 88 | |
| 89 | LOG_HEXDUMP_DBG(regs->vmctrl1, ILI9341_VMCTRL1_LEN, "VMCTRL1"); |
| 90 | r = ili9xxx_transmit(dev, ILI9341_VMCTRL1, regs->vmctrl1, ILI9341_VMCTRL1_LEN); |
| 91 | if (r < 0) { |
| 92 | return r; |
| 93 | } |
| 94 | |
| 95 | LOG_HEXDUMP_DBG(regs->vmctrl2, ILI9341_VMCTRL2_LEN, "VMCTRL2"); |
| 96 | r = ili9xxx_transmit(dev, ILI9341_VMCTRL2, regs->vmctrl2, ILI9341_VMCTRL2_LEN); |
| 97 | if (r < 0) { |
| 98 | return r; |
| 99 | } |
| 100 | |
| 101 | LOG_HEXDUMP_DBG(regs->pgamctrl, ILI9341_PGAMCTRL_LEN, "PGAMCTRL"); |
| 102 | r = ili9xxx_transmit(dev, ILI9341_PGAMCTRL, regs->pgamctrl, ILI9341_PGAMCTRL_LEN); |
| 103 | if (r < 0) { |
| 104 | return r; |
| 105 | } |
| 106 | |
| 107 | LOG_HEXDUMP_DBG(regs->ngamctrl, ILI9341_NGAMCTRL_LEN, "NGAMCTRL"); |
| 108 | r = ili9xxx_transmit(dev, ILI9341_NGAMCTRL, regs->ngamctrl, ILI9341_NGAMCTRL_LEN); |
| 109 | if (r < 0) { |
| 110 | return r; |
| 111 | } |
| 112 | |
| 113 | LOG_HEXDUMP_DBG(regs->enable3g, ILI9341_ENABLE3G_LEN, "ENABLE3G"); |
| 114 | r = ili9xxx_transmit(dev, ILI9341_ENABLE3G, regs->enable3g, ILI9341_ENABLE3G_LEN); |
| 115 | if (r < 0) { |
| 116 | return r; |
| 117 | } |
| 118 | |
Konstantinos Papadopoulos | 5e519fe | 2022-03-16 01:08:10 +0200 | [diff] [blame] | 119 | LOG_HEXDUMP_DBG(regs->ifmode, ILI9341_IFMODE_LEN, "IFMODE"); |
| 120 | r = ili9xxx_transmit(dev, ILI9341_IFMODE, regs->ifmode, ILI9341_IFMODE_LEN); |
| 121 | if (r < 0) { |
| 122 | return r; |
| 123 | } |
| 124 | |
| 125 | LOG_HEXDUMP_DBG(regs->ifctl, ILI9341_IFCTL_LEN, "IFCTL"); |
| 126 | r = ili9xxx_transmit(dev, ILI9341_IFCTL, regs->ifctl, ILI9341_IFCTL_LEN); |
| 127 | if (r < 0) { |
| 128 | return r; |
| 129 | } |
| 130 | |
Krivorot Oleg | 1d55d92 | 2021-06-23 12:34:41 +0300 | [diff] [blame] | 131 | LOG_HEXDUMP_DBG(regs->etmod, ILI9341_ETMOD_LEN, "ETMOD"); |
| 132 | r = ili9xxx_transmit(dev, ILI9341_ETMOD, regs->etmod, ILI9341_ETMOD_LEN); |
| 133 | if (r < 0) { |
| 134 | return r; |
| 135 | } |
| 136 | |
| 137 | return 0; |
| 138 | } |