Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: Apache-2.0 |
| 5 | */ |
| 6 | |
Kumar Gala | 88469b7 | 2020-03-24 15:58:31 -0500 | [diff] [blame] | 7 | #define DT_DRV_COMPAT litex_timer0 |
| 8 | |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 9 | #include <kernel.h> |
| 10 | #include <arch/cpu.h> |
| 11 | #include <device.h> |
| 12 | #include <irq.h> |
Jakub Cebulski | 265d2cf | 2020-05-18 17:32:22 +0200 | [diff] [blame] | 13 | #include <spinlock.h> |
Anas Nashif | 68c389c | 2019-06-21 12:55:37 -0400 | [diff] [blame] | 14 | #include <drivers/timer/system_timer.h> |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 15 | |
Kumar Gala | 88469b7 | 2020-03-24 15:58:31 -0500 | [diff] [blame] | 16 | #define TIMER_BASE DT_INST_REG_ADDR(0) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 17 | #define TIMER_LOAD_ADDR ((TIMER_BASE) + 0x00) |
| 18 | #define TIMER_RELOAD_ADDR ((TIMER_BASE) + 0x10) |
| 19 | #define TIMER_EN_ADDR ((TIMER_BASE) + 0x20) |
| 20 | #define TIMER_EV_PENDING_ADDR ((TIMER_BASE) + 0x3c) |
| 21 | #define TIMER_EV_ENABLE_ADDR ((TIMER_BASE) + 0x40) |
Jakub Cebulski | 265d2cf | 2020-05-18 17:32:22 +0200 | [diff] [blame] | 22 | #define TIMER_TOTAL_UPDATE ((TIMER_BASE) + 0x44) |
| 23 | #define TIMER_TOTAL ((TIMER_BASE) + 0x48) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 24 | |
| 25 | #define TIMER_EV 0x1 |
Kumar Gala | 88469b7 | 2020-03-24 15:58:31 -0500 | [diff] [blame] | 26 | #define TIMER_IRQ DT_INST_IRQN(0) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 27 | #define TIMER_DISABLE 0x0 |
| 28 | #define TIMER_ENABLE 0x1 |
Jakub Cebulski | 265d2cf | 2020-05-18 17:32:22 +0200 | [diff] [blame] | 29 | #define UPDATE_TOTAL 0x1 |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 30 | |
Tomasz Bursztyka | 4dcfb55 | 2020-06-17 14:58:56 +0200 | [diff] [blame] | 31 | static void litex_timer_irq_handler(const void *device) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 32 | { |
| 33 | ARG_UNUSED(device); |
| 34 | int key = irq_lock(); |
| 35 | |
| 36 | sys_write8(TIMER_EV, TIMER_EV_PENDING_ADDR); |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 37 | z_clock_announce(1); |
| 38 | |
| 39 | irq_unlock(key); |
| 40 | } |
| 41 | |
Kumar Gala | a1b77fd | 2020-05-27 11:26:57 -0500 | [diff] [blame] | 42 | uint32_t z_timer_cycle_get_32(void) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 43 | { |
Jakub Cebulski | 265d2cf | 2020-05-18 17:32:22 +0200 | [diff] [blame] | 44 | static struct k_spinlock lock; |
Kumar Gala | a1b77fd | 2020-05-27 11:26:57 -0500 | [diff] [blame] | 45 | uint32_t timer_total; |
Jakub Cebulski | 265d2cf | 2020-05-18 17:32:22 +0200 | [diff] [blame] | 46 | k_spinlock_key_t key = k_spin_lock(&lock); |
| 47 | |
| 48 | litex_write8(UPDATE_TOTAL, TIMER_TOTAL_UPDATE); |
Kumar Gala | a1b77fd | 2020-05-27 11:26:57 -0500 | [diff] [blame] | 49 | timer_total = (uint32_t)litex_read64(TIMER_TOTAL); |
Jakub Cebulski | 265d2cf | 2020-05-18 17:32:22 +0200 | [diff] [blame] | 50 | |
| 51 | k_spin_unlock(&lock, key); |
| 52 | |
| 53 | return timer_total; |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | /* tickless kernel is not supported */ |
Kumar Gala | a1b77fd | 2020-05-27 11:26:57 -0500 | [diff] [blame] | 57 | uint32_t z_clock_elapsed(void) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 58 | { |
| 59 | return 0; |
| 60 | } |
| 61 | |
Tomasz Bursztyka | e18fcbb | 2020-04-30 20:33:38 +0200 | [diff] [blame] | 62 | int z_clock_driver_init(const struct device *device) |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 63 | { |
| 64 | ARG_UNUSED(device); |
Kumar Gala | 88469b7 | 2020-03-24 15:58:31 -0500 | [diff] [blame] | 65 | IRQ_CONNECT(TIMER_IRQ, DT_INST_IRQ(0, priority), |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 66 | litex_timer_irq_handler, NULL, 0); |
| 67 | irq_enable(TIMER_IRQ); |
| 68 | |
| 69 | sys_write8(TIMER_DISABLE, TIMER_EN_ADDR); |
| 70 | |
| 71 | for (int i = 0; i < 4; i++) { |
Andy Ross | 8892406 | 2019-10-03 11:43:10 -0700 | [diff] [blame] | 72 | sys_write8(k_ticks_to_cyc_floor32(1) >> (24 - i * 8), |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 73 | TIMER_RELOAD_ADDR + i * 0x4); |
Andy Ross | 8892406 | 2019-10-03 11:43:10 -0700 | [diff] [blame] | 74 | sys_write8(k_ticks_to_cyc_floor32(1) >> (24 - i * 8), |
Filip Kokosinski | c0c3cdf | 2019-03-28 14:40:03 +0100 | [diff] [blame] | 75 | TIMER_LOAD_ADDR + i * 0x4); |
| 76 | } |
| 77 | |
| 78 | sys_write8(TIMER_ENABLE, TIMER_EN_ADDR); |
| 79 | sys_write8(sys_read8(TIMER_EV_PENDING_ADDR), TIMER_EV_PENDING_ADDR); |
| 80 | sys_write8(TIMER_EV, TIMER_EV_ENABLE_ADDR); |
| 81 | |
| 82 | return 0; |
| 83 | } |