Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 1 | /* |
Wojciech Bober | 923560a | 2017-02-13 16:31:53 +0100 | [diff] [blame] | 2 | * Copyright (c) 2016-2017 Nordic Semiconductor ASA |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 3 | * Copyright (c) 2018 Intel Corporation |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 4 | * |
David B. Kinder | ac74d8b | 2017-01-18 17:01:01 -0800 | [diff] [blame] | 5 | * SPDX-License-Identifier: Apache-2.0 |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <soc.h> |
| 9 | #include <clock_control.h> |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 10 | #include <drivers/clock_control/nrf5_clock_control.h> |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 11 | #include <system_timer.h> |
Ramesh Thomas | 89ffd44 | 2017-02-05 19:37:19 -0800 | [diff] [blame] | 12 | #include <sys_clock.h> |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 13 | #include <nrf_rtc.h> |
| 14 | #include <spinlock.h> |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 15 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 16 | #define RTC NRF_RTC1 |
Andy Ross | ab48827 | 2018-09-20 13:56:45 -0700 | [diff] [blame] | 17 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 18 | #define COUNTER_MAX 0x00ffffff |
| 19 | #define CYC_PER_TICK (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \ |
| 20 | / CONFIG_SYS_CLOCK_TICKS_PER_SEC) |
| 21 | #define MAX_TICKS ((COUNTER_MAX - CYC_PER_TICK) / CYC_PER_TICK) |
Wojciech Bober | 923560a | 2017-02-13 16:31:53 +0100 | [diff] [blame] | 22 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 23 | #define MIN_DELAY 32 |
Alberto Escolar Piedras | 785faea | 2018-06-15 15:17:49 +0200 | [diff] [blame] | 24 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 25 | static struct k_spinlock lock; |
Youvedeep Singh | a4063f5 | 2017-05-08 11:29:37 +0530 | [diff] [blame] | 26 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 27 | static u32_t last_count; |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 28 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 29 | static u32_t counter_sub(u32_t a, u32_t b) |
Carles Cufi | ca0951d | 2016-12-13 11:55:22 +0100 | [diff] [blame] | 30 | { |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 31 | return (a - b) & COUNTER_MAX; |
Wojciech Bober | 923560a | 2017-02-13 16:31:53 +0100 | [diff] [blame] | 32 | } |
| 33 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 34 | static void set_comparator(u32_t cyc) |
Ramakrishna Pallala | 5f44309 | 2018-06-25 11:32:54 +0530 | [diff] [blame] | 35 | { |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 36 | nrf_rtc_cc_set(RTC, 0, cyc & COUNTER_MAX); |
Ramakrishna Pallala | 5f44309 | 2018-06-25 11:32:54 +0530 | [diff] [blame] | 37 | } |
| 38 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 39 | static u32_t counter(void) |
Youvedeep Singh | a4063f5 | 2017-05-08 11:29:37 +0530 | [diff] [blame] | 40 | { |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 41 | return nrf_rtc_counter_get(RTC); |
Youvedeep Singh | a4063f5 | 2017-05-08 11:29:37 +0530 | [diff] [blame] | 42 | } |
| 43 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 44 | /* Note: this function has public linkage, and MUST have this |
| 45 | * particular name. The platform architecture itself doesn't care, |
| 46 | * but there is a test (tests/kernel/arm_irq_vector_table) that needs |
| 47 | * to find it to it can set it in a custom vector table. Should |
| 48 | * probably better abstract that at some point (e.g. query and reset |
| 49 | * it by pointer at runtime, maybe?) so we don't have this leaky |
| 50 | * symbol. |
Wojciech Bober | 923560a | 2017-02-13 16:31:53 +0100 | [diff] [blame] | 51 | */ |
Ioannis Glaropoulos | 8d2b22c | 2018-04-04 17:45:46 +0200 | [diff] [blame] | 52 | void rtc1_nrf5_isr(void *arg) |
Wojciech Bober | 923560a | 2017-02-13 16:31:53 +0100 | [diff] [blame] | 53 | { |
Youvedeep Singh | a4063f5 | 2017-05-08 11:29:37 +0530 | [diff] [blame] | 54 | ARG_UNUSED(arg); |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 55 | RTC->EVENTS_COMPARE[0] = 0; |
Youvedeep Singh | a4063f5 | 2017-05-08 11:29:37 +0530 | [diff] [blame] | 56 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 57 | k_spinlock_key_t key = k_spin_lock(&lock); |
| 58 | u32_t t = counter(); |
| 59 | u32_t dticks = counter_sub(t, last_count) / CYC_PER_TICK; |
Youvedeep Singh | 91063a3 | 2017-08-31 20:22:18 +0530 | [diff] [blame] | 60 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 61 | last_count += dticks * CYC_PER_TICK; |
| 62 | |
| 63 | if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) { |
| 64 | u32_t next = last_count + CYC_PER_TICK; |
| 65 | |
Peter A. Bigot | d2f5078 | 2018-11-29 12:56:38 -0600 | [diff] [blame] | 66 | if (counter_sub(next, t) < MIN_DELAY) { |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 67 | next += CYC_PER_TICK; |
Ramakrishna Pallala | 5f44309 | 2018-06-25 11:32:54 +0530 | [diff] [blame] | 68 | } |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 69 | set_comparator(next); |
Ramakrishna Pallala | 5f44309 | 2018-06-25 11:32:54 +0530 | [diff] [blame] | 70 | } |
Ramakrishna Pallala | 5f44309 | 2018-06-25 11:32:54 +0530 | [diff] [blame] | 71 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 72 | k_spin_unlock(&lock, key); |
| 73 | z_clock_announce(dticks); |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 74 | } |
| 75 | |
Andy Ross | 1a1a953 | 2018-09-21 09:33:36 -0700 | [diff] [blame] | 76 | int z_clock_driver_init(struct device *device) |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 77 | { |
| 78 | struct device *clock; |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 79 | |
| 80 | ARG_UNUSED(device); |
| 81 | |
| 82 | clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME); |
| 83 | if (!clock) { |
| 84 | return -1; |
| 85 | } |
| 86 | |
| 87 | clock_control_on(clock, (void *)CLOCK_CONTROL_NRF5_K32SRC); |
| 88 | |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 89 | /* TODO: replace with counter driver to access RTC */ |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 90 | nrf_rtc_prescaler_set(RTC, 0); |
| 91 | nrf_rtc_cc_set(RTC, 0, CYC_PER_TICK); |
| 92 | nrf_rtc_event_enable(RTC, RTC_EVTENSET_COMPARE0_Msk); |
| 93 | nrf_rtc_int_enable(RTC, RTC_INTENSET_COMPARE0_Msk); |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 94 | |
Ricardo Salveti | 51036ca | 2017-02-28 11:41:18 -0300 | [diff] [blame] | 95 | /* Clear the event flag and possible pending interrupt */ |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 96 | nrf_rtc_event_clear(RTC, NRF_RTC_EVENT_COMPARE_0); |
Ricardo Salveti | 51036ca | 2017-02-28 11:41:18 -0300 | [diff] [blame] | 97 | NVIC_ClearPendingIRQ(NRF5_IRQ_RTC1_IRQn); |
| 98 | |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 99 | IRQ_CONNECT(NRF5_IRQ_RTC1_IRQn, 1, rtc1_nrf5_isr, 0, 0); |
| 100 | irq_enable(NRF5_IRQ_RTC1_IRQn); |
| 101 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 102 | nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_CLEAR); |
| 103 | nrf_rtc_task_trigger(RTC, NRF_RTC_TASK_START); |
| 104 | |
| 105 | if (!IS_ENABLED(TICKLESS_KERNEL)) { |
| 106 | set_comparator(counter() + CYC_PER_TICK); |
| 107 | } |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 108 | |
Anas Nashif | 247a450 | 2016-11-27 22:35:52 -0500 | [diff] [blame] | 109 | return 0; |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 110 | } |
| 111 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 112 | void z_clock_set_timeout(s32_t ticks, bool idle) |
| 113 | { |
| 114 | ARG_UNUSED(idle); |
| 115 | |
| 116 | #ifdef CONFIG_TICKLESS_KERNEL |
| 117 | ticks = (ticks == K_FOREVER) ? MAX_TICKS : ticks; |
| 118 | ticks = max(min(ticks - 1, (s32_t)MAX_TICKS), 0); |
| 119 | |
| 120 | k_spinlock_key_t key = k_spin_lock(&lock); |
| 121 | u32_t cyc, t = counter(); |
| 122 | |
| 123 | /* Round up to next tick boundary */ |
| 124 | cyc = ticks * CYC_PER_TICK + counter_sub(t, last_count); |
| 125 | cyc += (CYC_PER_TICK - 1); |
| 126 | cyc = (cyc / CYC_PER_TICK) * CYC_PER_TICK; |
| 127 | cyc += last_count; |
| 128 | |
Peter A. Bigot | d2f5078 | 2018-11-29 12:56:38 -0600 | [diff] [blame] | 129 | if (counter_sub(cyc, t) < MIN_DELAY) { |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 130 | cyc += CYC_PER_TICK; |
| 131 | } |
| 132 | |
| 133 | set_comparator(cyc); |
| 134 | k_spin_unlock(&lock, key); |
| 135 | #endif |
| 136 | } |
| 137 | |
| 138 | u32_t z_clock_elapsed(void) |
| 139 | { |
| 140 | if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) { |
| 141 | return 0; |
| 142 | } |
| 143 | |
| 144 | k_spinlock_key_t key = k_spin_lock(&lock); |
| 145 | u32_t ret = counter_sub(counter(), last_count) / CYC_PER_TICK; |
| 146 | |
| 147 | k_spin_unlock(&lock, key); |
| 148 | return ret; |
| 149 | } |
| 150 | |
Kumar Gala | cc334c7 | 2017-04-21 10:55:34 -0500 | [diff] [blame] | 151 | u32_t _timer_cycle_get_32(void) |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 152 | { |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 153 | k_spinlock_key_t key = k_spin_lock(&lock); |
| 154 | u32_t ret = counter_sub(counter(), last_count) + last_count; |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 155 | |
Andy Ross | 03f007e | 2018-10-15 09:04:21 -0700 | [diff] [blame] | 156 | k_spin_unlock(&lock, key); |
| 157 | return ret; |
Vinayak Chettimada | a100ada | 2016-11-22 17:03:32 +0100 | [diff] [blame] | 158 | } |