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Neil Armstronga9183cd2017-05-02 14:55:08 +00001/*
2 * Copyright (c) 2017 Linaro Limited
3 * Copyright (c) 2017 BayLibre, SAS.
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
Flavio Ceolin67ca1762018-09-14 10:43:44 -07008#ifndef ZEPHYR_DRIVERS_FLASH_FLASH_STM32_H_
9#define ZEPHYR_DRIVERS_FLASH_FLASH_STM32_H_
Neil Armstronga9183cd2017-05-02 14:55:08 +000010
11#include <flash_registers.h>
12
Neil Armstrong32cb3f02017-12-04 14:09:59 +010013#if defined(CONFIG_SOC_SERIES_STM32L4X) || \
Erwan Gouriou82403f62019-02-14 15:38:52 +010014 defined(CONFIG_SOC_SERIES_STM32F0X) || \
Francois Ramubfc2ea62019-07-05 15:02:21 +020015 defined(CONFIG_SOC_SERIES_STM32F3X) || \
16 defined(CONFIG_SOC_SERIES_STM32G0X)
Anas Nashif17ddd172019-06-25 15:53:47 -040017#include <drivers/clock_control.h>
Neil Armstronga9183cd2017-05-02 14:55:08 +000018#include <clock_control/stm32_clock_control.h>
19#endif
20
21struct flash_stm32_priv {
Neil Armstrong32cb3f02017-12-04 14:09:59 +010022#if defined(CONFIG_SOC_SERIES_STM32F0X)
23 struct stm32f0x_flash *regs;
24 /* clock subsystem driving this peripheral */
25 struct stm32_pclken pclken;
Erwan Gouriou82403f62019-02-14 15:38:52 +010026#elif defined(CONFIG_SOC_SERIES_STM32F3X)
27 struct stm32f3x_flash *regs;
28 /* clock subsystem driving this peripheral */
29 struct stm32_pclken pclken;
Neil Armstrong32cb3f02017-12-04 14:09:59 +010030#elif defined(CONFIG_SOC_SERIES_STM32F4X)
Neil Armstronga9183cd2017-05-02 14:55:08 +000031 struct stm32f4x_flash *regs;
Aurelien Jarno6752b5d2018-09-02 21:05:52 +020032#elif defined(CONFIG_SOC_SERIES_STM32F7X)
33 struct stm32f7x_flash *regs;
Neil Armstronga9183cd2017-05-02 14:55:08 +000034#elif defined(CONFIG_SOC_SERIES_STM32L4X)
35 struct stm32l4x_flash *regs;
36 /* clock subsystem driving this peripheral */
37 struct stm32_pclken pclken;
Erwan Gourioud7774132019-03-27 16:52:37 +010038#elif defined(CONFIG_SOC_SERIES_STM32WBX)
39 struct stm32wbx_flash *regs;
Francois Ramubfc2ea62019-07-05 15:02:21 +020040#elif defined(CONFIG_SOC_SERIES_STM32G0X)
41 struct stm32g0x_flash *regs;
42 /* clock subsystem driving this peripheral */
43 struct stm32_pclken pclken;
Neil Armstronga9183cd2017-05-02 14:55:08 +000044#endif
45 struct k_sem sem;
46};
47
Marti Bolivar4fea6df2017-08-30 14:02:10 -040048#define FLASH_STM32_PRIV(dev) ((struct flash_stm32_priv *)((dev)->driver_data))
49#define FLASH_STM32_REGS(dev) (FLASH_STM32_PRIV(dev)->regs)
Neil Armstronga9183cd2017-05-02 14:55:08 +000050
Marti Bolivar32482e92017-08-30 16:39:26 -040051#ifdef CONFIG_FLASH_PAGE_LAYOUT
52static inline bool flash_stm32_range_exists(struct device *dev,
53 off_t offset,
54 u32_t len)
55{
56 struct flash_pages_info info;
57
58 return !(flash_get_page_info_by_offs(dev, offset, &info) ||
59 flash_get_page_info_by_offs(dev, offset + len - 1, &info));
60}
61#endif /* CONFIG_FLASH_PAGE_LAYOUT */
62
Marti Bolivar4fea6df2017-08-30 14:02:10 -040063bool flash_stm32_valid_range(struct device *dev, off_t offset,
64 u32_t len, bool write);
Neil Armstronga9183cd2017-05-02 14:55:08 +000065
Marti Bolivar4fea6df2017-08-30 14:02:10 -040066int flash_stm32_write_range(struct device *dev, unsigned int offset,
67 const void *data, unsigned int len);
Neil Armstronga9183cd2017-05-02 14:55:08 +000068
Marti Bolivar4fea6df2017-08-30 14:02:10 -040069int flash_stm32_block_erase_loop(struct device *dev, unsigned int offset,
70 unsigned int len);
Neil Armstronga9183cd2017-05-02 14:55:08 +000071
Marti Bolivar4fea6df2017-08-30 14:02:10 -040072int flash_stm32_wait_flash_idle(struct device *dev);
Neil Armstronga9183cd2017-05-02 14:55:08 +000073
Erwan Gourioud7774132019-03-27 16:52:37 +010074#ifdef CONFIG_SOC_SERIES_STM32WBX
75int flash_stm32_check_status(struct device *dev);
76#endif /* CONFIG_SOC_SERIES_STM32WBX */
77
Marti Bolivar32482e92017-08-30 16:39:26 -040078#ifdef CONFIG_FLASH_PAGE_LAYOUT
79void flash_stm32_page_layout(struct device *dev,
80 const struct flash_pages_layout **layout,
81 size_t *layout_size);
82#endif
Neil Armstronga9183cd2017-05-02 14:55:08 +000083
Flavio Ceolin67ca1762018-09-14 10:43:44 -070084#endif /* ZEPHYR_DRIVERS_FLASH_FLASH_STM32_H_ */