Pass core ID to port lock macros (#19)

Pass core ID to port task/ISR lock macros.
diff --git a/CCRH/U2x/port.c b/CCRH/U2x/port.c
index 9b95254..b964d90 100644
--- a/CCRH/U2x/port.c
+++ b/CCRH/U2x/port.c
@@ -220,12 +220,12 @@
     void vPortIPIHander( void );
     void vPortIPIRClearRequest( void );
 
-/* These below funtions implement recursive spinlock for exclusive access among
+/* These below functions implement recursive spinlock for exclusive access among
  * cores. The core will wait until lock will be available, whilst the core which
  * already had lock can acquire lock without waiting. This function could be
  * call from task and interrupt context, the critical section is called as in ISR */
-    void vPortRecursiveLockAcquire( BaseType_t xFromIsr );
-    void vPortRecursiveLockRelease( BaseType_t xFromIsr );
+    void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr );
+    void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr );
 
 #endif /* (configNUMBER_OF_CORES > 1) */
 
@@ -669,10 +669,9 @@
     }
 
 /*-----------------------------------------------------------*/
-    void vPortRecursiveLockAcquire( BaseType_t xFromIsr )
+    void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr )
     {
         BaseType_t xSavedInterruptStatus;
-        BaseType_t xCoreID = xPortGET_CORE_ID();
         BaseType_t xBitPosition = ( xFromIsr == pdTRUE );
 
         xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
@@ -686,10 +685,9 @@
         portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus );
     }
 
-    void vPortRecursiveLockRelease( BaseType_t xFromIsr )
+    void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr )
     {
         BaseType_t xSavedInterruptStatus;
-        BaseType_t xCoreID = xPortGET_CORE_ID();
         BaseType_t xBitPosition = ( xFromIsr == pdTRUE );
 
         xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
diff --git a/CCRH/U2x/portmacro.h b/CCRH/U2x/portmacro.h
index 88a082a..2ae0ba1 100644
--- a/CCRH/U2x/portmacro.h
+++ b/CCRH/U2x/portmacro.h
@@ -157,18 +157,18 @@
     #endif /* if ( configNUMBER_OF_CORES > 1 ) */
 
     #if ( configNUMBER_OF_CORES == 1 )
-        #define portGET_ISR_LOCK()
-        #define portRELEASE_ISR_LOCK()
-        #define portGET_TASK_LOCK()
-        #define portRELEASE_TASK_LOCK()
+        #define portGET_ISR_LOCK( xCoreID )
+        #define portRELEASE_ISR_LOCK( xCoreID )
+        #define portGET_TASK_LOCK( xCoreID )
+        #define portRELEASE_TASK_LOCK( xCoreID )
     #else
-        extern void vPortRecursiveLockAcquire( BaseType_t xFromIsr );
-        extern void vPortRecursiveLockRelease( BaseType_t xFromIsr );
+        extern void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr );
+        extern void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr );
 
-        #define portGET_ISR_LOCK()         vPortRecursiveLockAcquire( pdTRUE )
-        #define portRELEASE_ISR_LOCK()     vPortRecursiveLockRelease( pdTRUE )
-        #define portGET_TASK_LOCK()        vPortRecursiveLockAcquire( pdFALSE )
-        #define portRELEASE_TASK_LOCK()    vPortRecursiveLockRelease( pdFALSE )
+        #define portGET_ISR_LOCK( xCoreID )         vPortRecursiveLockAcquire( ( xCoreID ), pdTRUE )
+        #define portRELEASE_ISR_LOCK( xCoreID )     vPortRecursiveLockRelease( ( xCoreID ), pdTRUE )
+        #define portGET_TASK_LOCK( xCoreID )        vPortRecursiveLockAcquire( ( xCoreID ), pdFALSE )
+        #define portRELEASE_TASK_LOCK( xCoreID )    vPortRecursiveLockRelease( ( xCoreID ), pdFALSE )
     #endif /* if ( configNUMBER_OF_CORES == 1 ) */
 
 /*-----------------------------------------------------------*/
diff --git a/GHS/U2x/port.c b/GHS/U2x/port.c
index 7a7010a..2be9e84 100644
--- a/GHS/U2x/port.c
+++ b/GHS/U2x/port.c
@@ -220,12 +220,12 @@
     void vPortIPIHander( void );
     void vPortIPIRClearRequest( void );
 
-/* These below funtions implement recursive spinlock for exclusive access among
+/* These below functions implement recursive spinlock for exclusive access among
  * cores. The core will wait until lock will be available, whilst the core which
  * already had lock can acquire lock without waiting. This function could be
  * call from task and interrupt context, the critical section is called as in ISR */
-    void vPortRecursiveLockAcquire( BaseType_t xFromIsr );
-    void vPortRecursiveLockRelease( BaseType_t xFromIsr );
+    void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr );
+    void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr );
 
 #endif /* (configNUMBER_OF_CORES > 1) */
 
@@ -665,10 +665,9 @@
     }
 
 /*-----------------------------------------------------------*/
-    void vPortRecursiveLockAcquire( BaseType_t xFromIsr )
+    void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr )
     {
         BaseType_t xSavedInterruptStatus;
-        BaseType_t xCoreID = xPortGET_CORE_ID();
         BaseType_t xBitPosition = ( xFromIsr == pdTRUE );
 
         xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
@@ -682,10 +681,9 @@
         portCLEAR_INTERRUPT_MASK_FROM_ISR( xSavedInterruptStatus );
     }
 
-    void vPortRecursiveLockRelease( BaseType_t xFromIsr )
+    void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr )
     {
         BaseType_t xSavedInterruptStatus;
-        BaseType_t xCoreID = xPortGET_CORE_ID();
         BaseType_t xBitPosition = ( xFromIsr == pdTRUE );
 
         xSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
diff --git a/GHS/U2x/portmacro.h b/GHS/U2x/portmacro.h
index 62f3db7..74c01f3 100644
--- a/GHS/U2x/portmacro.h
+++ b/GHS/U2x/portmacro.h
@@ -170,18 +170,18 @@
     #endif /* if ( configNUMBER_OF_CORES > 1 ) */
 
     #if ( configNUMBER_OF_CORES == 1 )
-        #define portGET_ISR_LOCK()
-        #define portRELEASE_ISR_LOCK()
-        #define portGET_TASK_LOCK()
-        #define portRELEASE_TASK_LOCK()
+        #define portGET_ISR_LOCK( xCoreID )
+        #define portRELEASE_ISR_LOCK( xCoreID )
+        #define portGET_TASK_LOCK( xCoreID )
+        #define portRELEASE_TASK_LOCK( xCoreID )
     #else
-        extern void vPortRecursiveLockAcquire( BaseType_t xFromIsr );
-        extern void vPortRecursiveLockRelease( BaseType_t xFromIsr );
+        extern void vPortRecursiveLockAcquire( BaseType_t xCoreID, BaseType_t xFromIsr );
+        extern void vPortRecursiveLockRelease( BaseType_t xCoreID, BaseType_t xFromIsr );
 
-        #define portGET_ISR_LOCK()         vPortRecursiveLockAcquire( pdTRUE )
-        #define portRELEASE_ISR_LOCK()     vPortRecursiveLockRelease( pdTRUE )
-        #define portGET_TASK_LOCK()        vPortRecursiveLockAcquire( pdFALSE )
-        #define portRELEASE_TASK_LOCK()    vPortRecursiveLockRelease( pdFALSE )
+        #define portGET_ISR_LOCK( xCoreID )         vPortRecursiveLockAcquire( ( xCoreID ), pdTRUE )
+        #define portRELEASE_ISR_LOCK( xCoreID )     vPortRecursiveLockRelease( ( xCoreID ), pdTRUE )
+        #define portGET_TASK_LOCK( xCoreID )        vPortRecursiveLockAcquire( ( xCoreID ), pdFALSE )
+        #define portRELEASE_TASK_LOCK( xCoreID )    vPortRecursiveLockRelease( ( xCoreID ), pdFALSE )
     #endif /* if ( configNUMBER_OF_CORES == 1 ) */
 
 /*-----------------------------------------------------------*/
diff --git a/TI/CORTEX_A53_64-BIT_TI_AM64_SMP/portmacro.h b/TI/CORTEX_A53_64-BIT_TI_AM64_SMP/portmacro.h
index 126b9ff..b85ab70 100644
--- a/TI/CORTEX_A53_64-BIT_TI_AM64_SMP/portmacro.h
+++ b/TI/CORTEX_A53_64-BIT_TI_AM64_SMP/portmacro.h
@@ -187,11 +187,11 @@
 #define portRTOS_LOCK_COUNT 2
 #define portMAX_CORE_COUNT 2
 
-#define portRELEASE_ISR_LOCK()  vPortRecursiveLock(ISR_LOCK, pdFALSE)
-#define portGET_ISR_LOCK()  vPortRecursiveLock(ISR_LOCK, pdTRUE)
+#define portRELEASE_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), ISR_LOCK, pdFALSE )
+#define portGET_ISR_LOCK( xCoreID )     vPortRecursiveLock( ( xCoreID ), ISR_LOCK, pdTRUE )
 
-#define portRELEASE_TASK_LOCK()  vPortRecursiveLock(TASK_LOCK, pdFALSE)
-#define portGET_TASK_LOCK()  vPortRecursiveLock(TASK_LOCK, pdTRUE)
+#define portRELEASE_TASK_LOCK( xCoreID )    vPortRecursiveLock( ( xCoreID ), TASK_LOCK, pdFALSE )
+#define portGET_TASK_LOCK( xCoreID )        vPortRecursiveLock( ( xCoreID ), TASK_LOCK, pdTRUE )
 
 /* Interrupt number to interrupt a core for task yield */
 #define YIELD_CORE_INTERRUPT_NO     (0U)
@@ -218,9 +218,8 @@
 int32_t GateSmp_tryLock(uint32_t* gateWord);
 void GateSmp_unlock(uint32_t* gateWord);
 
-static inline void vPortRecursiveLock(uint32_t ulLockNum, BaseType_t uxAcquire)
+static inline void vPortRecursiveLock(BaseType_t xCoreID, uint32_t ulLockNum, BaseType_t uxAcquire)
 {
-    uint32_t ulCoreNum = portGET_CORE_ID();
     uint32_t ulLockBit = 1u << ulLockNum;
 
     /* Lock acquire */
@@ -234,7 +233,7 @@
         if( GateSmp_tryLock( &GateWord[ulLockNum] ) != 0)
         {
             /* Check if the core owns the spinlock */
-            if( Get_64(&ucOwnedByCore[ulCoreNum]) & ulLockBit )
+            if( Get_64(&ucOwnedByCore[xCoreID]) & ulLockBit )
             {
                 configASSERT( Get_64(&ucRecursionCountByLock[ulLockNum]) != 255u);
                 Set_64(&ucRecursionCountByLock[ulLockNum], (Get_64(&ucRecursionCountByLock[ulLockNum])+1));
@@ -261,13 +260,13 @@
         /* Set lock count as 1 */
         Set_64(&ucRecursionCountByLock[ulLockNum], 1);
         /* Set ucOwnedByCore */
-        Set_64(&ucOwnedByCore[ulCoreNum], (Get_64(&ucOwnedByCore[ulCoreNum]) | ulLockBit));
+        Set_64(&ucOwnedByCore[xCoreID], (Get_64(&ucOwnedByCore[xCoreID]) | ulLockBit));
     }
     /* Lock release */
     else
     {
         /* Assert the lock is not free already */
-        configASSERT( (Get_64(&ucOwnedByCore[ulCoreNum]) & ulLockBit) != 0 );
+        configASSERT( (Get_64(&ucOwnedByCore[xCoreID]) & ulLockBit) != 0 );
         configASSERT( Get_64(&ucRecursionCountByLock[ulLockNum]) != 0 );
 
         /* Reduce ucRecursionCountByLock by 1 */
@@ -275,7 +274,7 @@
 
         if( !Get_64(&ucRecursionCountByLock[ulLockNum]) )
         {
-            Set_64(&ucOwnedByCore[ulCoreNum], (Get_64(&ucOwnedByCore[ulCoreNum]) & ~ulLockBit));
+            Set_64(&ucOwnedByCore[xCoreID], (Get_64(&ucOwnedByCore[xCoreID]) & ~ulLockBit));
             GateSmp_unlock(&GateWord[ulLockNum]);
             /* Add barrier to ensure lock is taken before we proceed */
             __asm__ __volatile__ (