| /* |
| * Copyright 2022-2023, NXP |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /dts-v1/; |
| |
| #include <nxp/nxp_rt5xx.dtsi> |
| |
| #include "mimxrt595_evk_cm33-pinctrl.dtsi" |
| |
| #include <zephyr/dt-bindings/display/panel.h> |
| |
| / { |
| model = "NXP MIMXRT595-EVK board"; |
| compatible = "nxp,mimxrt595"; |
| |
| aliases { |
| sw0 = &user_button_1; |
| sw1 = &user_button_2; |
| led0 = &green_led; |
| led1 = &blue_led; |
| led2 = &red_led; |
| usart-0 = &flexcomm0; |
| watchdog0 = &wwdt0; |
| magn0 = &fxos8700; |
| accel0 = &fxos8700; |
| sdhc0 = &usdhc0; |
| kscan0 = &touch_controller; |
| pwm-0 = &sc_timer; |
| }; |
| |
| chosen { |
| zephyr,flash-controller = &mx25um51345g; |
| zephyr,flash = &mx25um51345g; |
| zephyr,code-partition = &slot0_partition; |
| zephyr,sram = &sram0; |
| zephyr,console = &flexcomm0; |
| zephyr,shell-uart = &flexcomm0; |
| zephyr,display = &lcdif; |
| zephyr,keyboard-scan = &touch_controller; |
| }; |
| |
| gpio_keys { |
| compatible = "gpio-keys"; |
| user_button_1: button_0 { |
| label = "User SW1"; |
| gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; |
| }; |
| user_button_2: button_1 { |
| label = "User SW2"; |
| gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| green_led: led_1 { |
| gpios = <&gpio1 0 0>; |
| label = "User LED_GREEN"; |
| }; |
| blue_led: led_2 { |
| gpios = <&gpio3 17 0>; |
| label = "User LED_BLUE"; |
| }; |
| red_led: led_3 { |
| gpios = <&gpio0 14 0>; |
| label = "User LED_RED"; |
| }; |
| }; |
| |
| arduino_header: arduino-connector { |
| compatible = "arduino-header-r3"; |
| #gpio-cells = <2>; |
| gpio-map-mask = <0xffffffff 0xffffffc0>; |
| gpio-map-pass-thru = <0 0x3f>; |
| gpio-map = <0 0 &gpio0 5 0>, /* A0 */ |
| <1 0 &gpio0 6 0>, /* A1 */ |
| <2 0 &gpio0 19 0>, /* A2 */ |
| <3 0 &gpio0 13 0>, /* A3 */ |
| <4 0 &gpio4 22 0>, /* A4 */ |
| <5 0 &gpio4 21 0>, /* A5 */ |
| <6 0 &gpio4 31 0>, /* D0 */ |
| <7 0 &gpio4 30 0>, /* D1 */ |
| <8 0 &gpio4 20 0>, /* D2 */ |
| <9 0 &gpio4 23 0>, /* D3 */ |
| <10 0 &gpio4 24 0>, /* D4 */ |
| <11 0 &gpio4 25 0>, /* D5 */ |
| <12 0 &gpio4 26 0>, /* D6 */ |
| <13 0 &gpio4 27 0>, /* D7 */ |
| <14 0 &gpio4 28 0>, /* D8 */ |
| <15 0 &gpio4 29 0>, /* D9 */ |
| <16 0 &gpio5 0 0>, /* D10 */ |
| <17 0 &gpio5 1 0>, /* D11 */ |
| <18 0 &gpio5 2 0>, /* D12 */ |
| <19 0 &gpio5 3 0>, /* D13 */ |
| <20 0 &gpio4 22 0>, /* D14 */ |
| <21 0 &gpio4 21 0>; /* D15 */ |
| }; |
| |
| power-states { |
| /* This is the setting Sleep Mode */ |
| idle: idle { |
| compatible = "zephyr,power-state"; |
| power-state-name = "runtime-idle"; |
| min-residency-us = <0>; |
| exit-latency-us = <0>; |
| }; |
| /* This is the setting for Deep-sleep Mode */ |
| suspend: suspend { |
| compatible = "nxp,pdcfg-power", "zephyr,power-state"; |
| power-state-name = "suspend-to-idle"; |
| min-residency-us = <500>; |
| exit-latency-us = <120>; |
| /* |
| * These values are written to the PDSLEEPCFG registers to keep certain |
| * blocks such as LPOSC, SRAM's, FlexSPI0 SRAM powered on during deep |
| * sleep mode. |
| */ |
| deep-sleep-config = <0xC800>, |
| <0x80000004>, |
| <0xFFFFFFFF>, |
| <0>; |
| }; |
| /* |
| * Deep power-down mode is supported in this SoC through 'PM_STATE_SOFT_OFF' state. |
| * There is no entry for this in device tree, user can call pm_state_force to enter |
| * this state. |
| */ |
| }; |
| |
| en_mipi_display: enable-mipi-display { |
| compatible = "regulator-fixed"; |
| regulator-name = "en_mipi_display"; |
| enable-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; |
| regulator-boot-on; |
| }; |
| }; |
| |
| &cpu0 { |
| cpu-power-states = <&idle &suspend>; |
| }; |
| |
| /* |
| * RT595 EVK board uses OS timer as the kernel timer |
| * In case we need to switch to SYSTICK timer, then |
| * replace &os_timer with &systick |
| */ |
| &os_timer { |
| status = "okay"; |
| wakeup-source; |
| }; |
| |
| &rtc { |
| status = "okay"; |
| }; |
| |
| &lcdif { |
| status = "okay"; |
| width = <720>; |
| height = <1280>; |
| display-timings { |
| compatible = "zephyr,panel-timing"; |
| hsync-len = <8>; |
| hfront-porch = <32>; |
| hback-porch = <32>; |
| vsync-len = <2>; |
| vfront-porch = <16>; |
| vback-porch = <14>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <1>; |
| /* |
| * Pixel clock is given by the following formula: |
| * (height + vsync-len + vfront-porch + vback-porch) * |
| * (width + hsync-len + hfront-porch + hback-porch) * frame rate |
| */ |
| clock-frequency = <62346240>; |
| }; |
| backlight-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; |
| data-bus-width = "24-bit"; |
| pixel-format = <PANEL_PIXEL_FORMAT_BGR_565>; |
| }; |
| |
| &mipi_dsi { |
| status = "okay"; |
| nxp,lcdif = <&lcdif>; |
| dpi-color-coding = "24-bit"; |
| dpi-pixel-packet = "24-bit"; |
| dpi-video-mode = "burst"; |
| dpi-bllp-mode = "low-power"; |
| autoinsert-eotp; |
| /* |
| * PHY clock is given by the following formula: |
| * (pixel clock * bits per pixel) / MIPI data lanes |
| */ |
| phy-clock = <748154880>; |
| |
| rm68200@0 { |
| status = "okay"; |
| compatible = "raydium,rm68200"; |
| reg = <0x0>; |
| reset-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; |
| data-lanes = <2>; |
| width = <720>; |
| height = <1280>; |
| pixel-format = <MIPI_DSI_PIXFMT_RGB565>; |
| }; |
| }; |
| |
| &flexcomm0 { |
| compatible = "nxp,lpc-usart"; |
| status = "okay"; |
| current-speed = <115200>; |
| pinctrl-0 = <&pinmux_flexcomm0_usart>; |
| pinctrl-names = "default"; |
| }; |
| |
| arduino_i2c: &flexcomm4 { |
| compatible = "nxp,lpc-i2c"; |
| status = "okay"; |
| clock-frequency = <I2C_BITRATE_FAST>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-0 = <&pinmux_flexcomm4_i2c>; |
| pinctrl-names = "default"; |
| |
| fxos8700: fxos8700@1e { |
| compatible = "nxp,fxos8700"; |
| reg = <0x1e>; |
| int1-gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; |
| reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| touch_controller: gt911@5d { |
| compatible = "goodix,gt911"; |
| reg = <0x5d>; |
| irq-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; |
| reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| hs_spi1: &hs_lspi1 { |
| compatible = "nxp,lpc-spi"; |
| pinctrl-0 = <&pinmux_flexcomm16_spi>; |
| pinctrl-names = "default"; |
| dmas = <&dma0 28>, <&dma0 29>; |
| dma-names = "rx", "tx"; |
| status = "okay"; |
| }; |
| |
| /* I2S RX */ |
| i2s0: &flexcomm1 { |
| compatible = "nxp,lpc-i2s"; |
| pinctrl-0 = <&pinmux_flexcomm1_i2s>; |
| pinctrl-names = "default"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| dmas = <&dma0 2>; |
| dma-names = "rx"; |
| status = "disabled"; |
| }; |
| |
| /* I2S TX */ |
| i2s1: &flexcomm3 { |
| compatible = "nxp,lpc-i2s"; |
| pinctrl-0 = <&pinmux_flexcomm3_i2s>; |
| pinctrl-names = "default"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| dmas = <&dma0 7>; |
| dma-names = "tx"; |
| status = "disabled"; |
| }; |
| |
| arduino_serial: &flexcomm12 { |
| compatible = "nxp,lpc-usart"; |
| status = "okay"; |
| current-speed = <115200>; |
| pinctrl-0 = <&pinmux_flexcomm12_usart>; |
| pinctrl-names = "default"; |
| }; |
| |
| /* PCA9420 PMIC */ |
| &pmic_i2c { |
| status = "okay"; |
| clock-frequency = <I2C_BITRATE_FAST>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-0 = <&pinmux_pmic_i2c>; |
| pinctrl-names = "default"; |
| |
| pca9420: pca9420@61 { |
| compatible = "nxp,pca9420"; |
| reg = <0x61>; |
| nxp,enable-modesel-pins; |
| |
| pca9420_sw1: BUCK1 { |
| regulator-boot-on; |
| nxp,mode0-microvolt = <1100000>; |
| nxp,mode1-microvolt = <600000>; |
| nxp,mode2-microvolt = <0>; |
| }; |
| |
| pca9420_sw2: BUCK2 { |
| regulator-boot-on; |
| nxp,mode0-microvolt = <1800000>; |
| nxp,mode1-microvolt = <1800000>; |
| nxp,mode2-microvolt = <1800000>; |
| |
| }; |
| |
| pca9420_ldo1: LDO1 { |
| regulator-boot-on; |
| nxp,mode0-microvolt = <1800000>; |
| nxp,mode1-microvolt = <1800000>; |
| nxp,mode2-microvolt = <1800000>; |
| }; |
| |
| pca9420_ldo2: LDO2 { |
| regulator-boot-on; |
| nxp,mode0-microvolt = <3300000>; |
| nxp,mode1-microvolt = <3300000>; |
| nxp,mode2-microvolt = <3300000>; |
| }; |
| }; |
| }; |
| |
| &lpadc0 { |
| status = "okay"; |
| pinctrl-0 = <&pinmux_lpadc0>; |
| pinctrl-names = "default"; |
| }; |
| |
| &gpio0 { |
| status = "okay"; |
| }; |
| |
| &gpio1 { |
| status = "okay"; |
| }; |
| |
| &gpio2 { |
| status = "okay"; |
| }; |
| |
| /* |
| * GPIO module interrupts are shared between all GPIO devices on this |
| * SOC, but Zephyr does not currently support sharing interrupts between |
| * devices. The user can select GPIO modules to support interrupts by |
| * setting the appropriate `int-source` and `interrupt` property for |
| * a given module. On this board, GPIO3 and GPIO4 are configured to support |
| * interrupts. |
| */ |
| &gpio3 { |
| status = "okay"; |
| int-source = "int-a"; |
| interrupts = <2 0>; |
| }; |
| |
| &gpio4 { |
| status = "okay"; |
| int-source = "int-b"; |
| interrupts = <3 0>; |
| }; |
| |
| &gpio5 { |
| status = "okay"; |
| }; |
| |
| &gpio6 { |
| status = "okay"; |
| }; |
| |
| &user_button_1 { |
| status = "okay"; |
| }; |
| |
| &user_button_2 { |
| status = "okay"; |
| }; |
| |
| &green_led { |
| status = "okay"; |
| }; |
| |
| &blue_led { |
| status = "okay"; |
| }; |
| |
| &red_led { |
| status = "okay"; |
| }; |
| |
| &dma0 { |
| /* |
| * The total number of dma channels available is defined by |
| * FSL_FEATURE_DMA_NUMBER_OF_CHANNELS in the SoC features file. |
| * Since memory from the heap pool is allocated based on the number |
| * of DMA channels, set this property to as many channels is needed |
| * for the platform. Adjust HEAP_MEM_POOL_SIZE in case you need more |
| * memory. |
| */ |
| dma-channels = <37>; |
| status = "okay"; |
| }; |
| |
| zephyr_udc0: &usbhs { |
| status = "okay"; |
| }; |
| |
| &ctimer0 { |
| status = "okay"; |
| }; |
| |
| &ctimer1 { |
| status = "okay"; |
| }; |
| |
| &ctimer2 { |
| status = "okay"; |
| }; |
| |
| &ctimer3 { |
| status = "okay"; |
| }; |
| |
| &ctimer4 { |
| status = "okay"; |
| }; |
| |
| &usdhc0 { |
| status = "okay"; |
| pwr-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; |
| cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; |
| mmc { |
| compatible = "zephyr,mmc-disk"; |
| status = "okay"; |
| }; |
| pinctrl-0 = <&pinmux_usdhc>; |
| pinctrl-names = "default"; |
| mmc-hs200-1_8v; |
| mmc-hs400-1_8v; |
| }; |
| |
| &wwdt0 { |
| status = "okay"; |
| }; |
| |
| &flexspi { |
| status = "okay"; |
| pinctrl-0 = <&pinmux_flexspi>; |
| pinctrl-1 = <&pinmux_flexspi_sleep>; |
| pinctrl-names = "default", "sleep"; |
| |
| mx25um51345g: mx25um51345g@0 { |
| compatible = "nxp,imx-flexspi-mx25um51345g"; |
| /* MX25UM51245G is 64MB, 512MBit flash part */ |
| size = <DT_SIZE_M(64 * 8)>; |
| reg = <0>; |
| spi-max-frequency = <200000000>; |
| status = "okay"; |
| jedec-id = [c2 81 3a]; |
| erase-block-size = <4096>; |
| write-block-size = <16>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| boot_partition: partition@0 { |
| label = "mcuboot"; |
| reg = <0x00000000 DT_SIZE_K(128)>; |
| }; |
| slot0_partition: partition@20000 { |
| label = "image-0"; |
| reg = <0x00020000 DT_SIZE_K(3076)>; |
| }; |
| slot1_partition: partition@321000 { |
| label = "image-1"; |
| reg = <0x00321000 DT_SIZE_K(3072)>; |
| }; |
| storage_partition: partition@621000 { |
| label = "storage"; |
| reg = <0x00621000 DT_SIZE_M(57)>; |
| }; |
| }; |
| }; |
| }; |
| |
| /* |
| * Configure FlexSPI2 to use 1KB of AHB RX buffer for GPU/Display master. |
| * This will improve performance when using external pSRAM with the LCDIF. |
| */ |
| &flexspi2 { |
| status = "okay"; |
| pinctrl-0 = <&pinmux_flexspi2>; |
| pinctrl-names = "default"; |
| rx-clock-source = <3>; |
| ahb-prefetch; |
| ahb-bufferable; |
| ahb-cacheable; |
| ahb-read-addr-opt; |
| rx-buffer-config = <1 7 11 1024>; |
| aps6408l: aps6408l@0 { |
| compatible = "nxp,imx-flexspi-aps6408l"; |
| /* APS6408L is 8MB, 64MBit pSRAM */ |
| size = <DT_SIZE_M(8 * 8)>; |
| reg = <0>; |
| spi-max-frequency = <198000000>; |
| status = "okay"; |
| cs-interval-unit = <1>; |
| cs-interval = <5>; |
| cs-hold-time = <3>; |
| cs-setup-time = <3>; |
| data-valid-time = <1>; |
| column-space = <0>; |
| ahb-write-wait-unit = <2>; |
| ahb-write-wait-interval = <0>; |
| }; |
| }; |
| |
| &sc_timer { |
| pinctrl-0 = <&pinmux_sctimer_default>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |
| |
| &i3c0 { |
| pinctrl-0 = <&pinmux_i3c>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |