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# i.MX RT5XX Series
# Copyright (c) 2022, NXP
# SPDX-License-Identifier: Apache-2.0
choice
prompt "i.MX RT5XX Series MCU Selection"
depends on SOC_SERIES_IMX_RT5XX
config SOC_MIMXRT595S_CM33
bool "SOC_MIMXRT595S M33"
select CPU_HAS_ARM_SAU
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU
select PLATFORM_SPECIFIC_INIT
select ARMV8_M_DSP
select ARM_TRUSTZONE_M
select CPU_CORTEX_M_HAS_SYSTICK
select HAS_MCUX
select HAS_MCUX_SYSCON
select HAS_MCUX_FLEXCOMM
select HAS_MCUX_FLEXSPI
select HAS_MCUX_CACHE
select HAS_MCUX_LPC_DMA
select HAS_MCUX_LPADC
select HAS_MCUX_OS_TIMER
select HAS_MCUX_LPC_RTC
select HAS_MCUX_TRNG
select HAS_MCUX_SCTIMER
select HAS_MCUX_USDHC1
select HAS_MCUX_USDHC2
select HAS_MCUX_USB_LPCIP3511
select HAS_MCUX_CTIMER
endchoice
if SOC_SERIES_IMX_RT5XX
config SOC_PART_NUMBER_MIMXRT533SFFOC
bool
config SOC_PART_NUMBER_MIMXRT555SFFOC
bool
config SOC_PART_NUMBER_MIMXRT595SFFOC
bool
config SOC_PART_NUMBER_MIMXRT533SFAWCR
bool
config SOC_PART_NUMBER_MIMXRT555SFAWCR
bool
config SOC_PART_NUMBER_MIMXRT595SFAWCR
bool
config SOC_PART_NUMBER_IMX_RT5XX
string
default "MIMXRT533SFAWCR" if SOC_PART_NUMBER_MIMXRT533SFAWCR
default "MIMXRT555SFAWCR" if SOC_PART_NUMBER_MIMXRT555SFAWCR
default "MIMXRT595SFAWCR" if SOC_PART_NUMBER_MIMXRT595SFAWCR
default "MIMXRT533SFFOC" if SOC_PART_NUMBER_MIMXRT533SFFOC
default "MIMXRT555SFFOC" if SOC_PART_NUMBER_MIMXRT555SFFOC
default "MIMXRT595SFFOC" if SOC_PART_NUMBER_MIMXRT595SFFOC
help
This string holds the full part number of the SoC. It is a hidden
option that you should not set directly. The part number selection
choice defines the default value for this string.
menuconfig NXP_IMX_RT5XX_BOOT_HEADER
bool "The boot header"
depends on !BOOTLOADER_MCUBOOT
help
Enable data structures required by the boot ROM to boot the
application from an external flash device.
if NXP_IMX_RT5XX_BOOT_HEADER
choice BOOT_DEVICE
prompt "Boot device selection"
default BOOT_FLEXSPI_NOR
config BOOT_FLEXSPI_NOR
bool "FlexSPI serial NOR"
endchoice
config FLASH_CONFIG_OFFSET
hex "Flash config data offset"
default 0x400
help
The flash config offset provides the boot ROM with the on-board
flash type and parameters. The boot ROM requires a fixed flash config
offset for FlexSPI device.
config IMAGE_VECTOR_TABLE_OFFSET
hex "Image vector table offset"
default 0x1000
help
The Image Vector Table (IVT) provides the boot ROM with pointers to
the application entry point and device configuration data. The boot
ROM requires a fixed IVT offset for each type of boot device.
endif # NXP_IMX_RT5XX_BOOT_HEADER
config IMXRT5XX_CODE_CACHE
bool "Code cache"
default y
help
Enable code cache for FlexSPI region at boot. If this Kconfig is
cleared, the CACHE64 controller will be disabled during SOC init
endif # SOC_SERIES_IMX_RT5XX