dts: arm: stm32 devices with hsi48 clock
Add the HSI48 clock to the stm32 devices that have this
clock signal.
Within a stm32 family, only few might have the
RCC_HSI48_SUPPORT.
STM32WB has a CLK48 mux.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
diff --git a/dts/arm/st/f0/stm32f072.dtsi b/dts/arm/st/f0/stm32f072.dtsi
index 296b893..8fa2bfe 100644
--- a/dts/arm/st/f0/stm32f072.dtsi
+++ b/dts/arm/st/f0/stm32f072.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
pinctrl: pin-controller@48000000 {
gpioe: gpio@48001000 {
diff --git a/dts/arm/st/f0/stm32f091.dtsi b/dts/arm/st/f0/stm32f091.dtsi
index ca60e64..8fe433b 100644
--- a/dts/arm/st/f0/stm32f091.dtsi
+++ b/dts/arm/st/f0/stm32f091.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
flash-controller@40022000 {
flash0: flash@8000000 {
erase-block-size = <2048>;
diff --git a/dts/arm/st/g0/stm32g0b1.dtsi b/dts/arm/st/g0/stm32g0b1.dtsi
index 3e74eff..fdec869 100644
--- a/dts/arm/st/g0/stm32g0b1.dtsi
+++ b/dts/arm/st/g0/stm32g0b1.dtsi
@@ -9,6 +9,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
pinctrl: pin-controller@50000000 {
gpioe: gpio@50001000 {
compatible = "st,stm32-gpio";
diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi
index 92051d5..bf0829a 100644
--- a/dts/arm/st/g4/stm32g4.dtsi
+++ b/dts/arm/st/g4/stm32g4.dtsi
@@ -50,6 +50,13 @@
status = "disabled";
};
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+
clk_lse: clk-lse {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/dts/arm/st/h7/stm32h7.dtsi b/dts/arm/st/h7/stm32h7.dtsi
index 9c0cf7c..6e861f3 100644
--- a/dts/arm/st/h7/stm32h7.dtsi
+++ b/dts/arm/st/h7/stm32h7.dtsi
@@ -58,6 +58,13 @@
status = "disabled";
};
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+
clk_csi: clk-csi {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/dts/arm/st/l0/stm32l053.dtsi b/dts/arm/st/l0/stm32l053.dtsi
index 5940405..9b1c236 100644
--- a/dts/arm/st/l0/stm32l053.dtsi
+++ b/dts/arm/st/l0/stm32l053.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
usb: usb@40005c00 {
compatible = "st,stm32-usb";
reg = <0x40005c00 0x400>;
diff --git a/dts/arm/st/l0/stm32l072.dtsi b/dts/arm/st/l0/stm32l072.dtsi
index 7a600be..d8a97f4 100644
--- a/dts/arm/st/l0/stm32l072.dtsi
+++ b/dts/arm/st/l0/stm32l072.dtsi
@@ -12,6 +12,15 @@
};
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
usb: usb@40005c00 {
compatible = "st,stm32-usb";
reg = <0x40005c00 0x400>;
diff --git a/dts/arm/st/l4/stm32l412.dtsi b/dts/arm/st/l4/stm32l412.dtsi
index bf61292..44e2884 100644
--- a/dts/arm/st/l4/stm32l412.dtsi
+++ b/dts/arm/st/l4/stm32l412.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
usb: usb@40006800 {
compatible = "st,stm32-usb";
reg = <0x40006800 0x40000>;
diff --git a/dts/arm/st/l4/stm32l432.dtsi b/dts/arm/st/l4/stm32l432.dtsi
index 91aeeae..b50216c 100644
--- a/dts/arm/st/l4/stm32l432.dtsi
+++ b/dts/arm/st/l4/stm32l432.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
spi3: spi@40003c00 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
diff --git a/dts/arm/st/l4/stm32l452.dtsi b/dts/arm/st/l4/stm32l452.dtsi
index 8059469..10eee65 100644
--- a/dts/arm/st/l4/stm32l452.dtsi
+++ b/dts/arm/st/l4/stm32l452.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
pinctrl: pin-controller@48000000 {
gpiod: gpio@48000c00 {
compatible = "st,stm32-gpio";
diff --git a/dts/arm/st/l4/stm32l496.dtsi b/dts/arm/st/l4/stm32l496.dtsi
index 763a9b0..02a9f19 100644
--- a/dts/arm/st/l4/stm32l496.dtsi
+++ b/dts/arm/st/l4/stm32l496.dtsi
@@ -8,6 +8,15 @@
/ {
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
i2c4: i2c@40008400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
diff --git a/dts/arm/st/l4/stm32l4r5.dtsi b/dts/arm/st/l4/stm32l4r5.dtsi
index 313ed6b..db9fc47 100644
--- a/dts/arm/st/l4/stm32l4r5.dtsi
+++ b/dts/arm/st/l4/stm32l4r5.dtsi
@@ -16,6 +16,15 @@
};
soc {
+ clocks {
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+ };
+
flash-controller@40022000 {
flash0: flash@8000000 {
erase-block-size = <4096>;
diff --git a/dts/arm/st/l5/stm32l5.dtsi b/dts/arm/st/l5/stm32l5.dtsi
index 2e20d23..8e561cd 100644
--- a/dts/arm/st/l5/stm32l5.dtsi
+++ b/dts/arm/st/l5/stm32l5.dtsi
@@ -59,6 +59,13 @@
status = "disabled";
};
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+
clk_msi: clk-msi {
#clock-cells = <0>;
compatible = "st,stm32-msi-clock";
diff --git a/dts/arm/st/u5/stm32u5.dtsi b/dts/arm/st/u5/stm32u5.dtsi
index 24adb25..5e96cfd 100644
--- a/dts/arm/st/u5/stm32u5.dtsi
+++ b/dts/arm/st/u5/stm32u5.dtsi
@@ -57,6 +57,13 @@
status = "disabled";
};
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+
clk_msis: clk-msis {
#clock-cells = <0>;
compatible = "st,stm32u5-msi-clock";
diff --git a/dts/arm/st/wb/stm32wb.dtsi b/dts/arm/st/wb/stm32wb.dtsi
index 984d887..4c90ec8 100644
--- a/dts/arm/st/wb/stm32wb.dtsi
+++ b/dts/arm/st/wb/stm32wb.dtsi
@@ -63,6 +63,13 @@
status = "disabled";
};
+ clk_hsi48: clk-hsi48 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <DT_FREQ_M(48)>;
+ status = "disabled";
+ };
+
clk_msi: clk-msi {
#clock-cells = <0>;
compatible = "st,stm32-msi-clock";
@@ -97,6 +104,12 @@
compatible = "st,stm32wb-pll-clock";
status = "disabled";
};
+
+ clk48: clk48 {
+ #clock-cells = <0>;
+ compatible = "st,stm32-clock-mux";
+ status = "disabled";
+ };
};
soc {
