| /* |
| * Copyright (c) 2020 Intel Corporation. |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include "skeleton.dtsi" |
| #include <dt-bindings/interrupt-controller/intel-ioapic.h> |
| #include <dt-bindings/i2c/i2c.h> |
| #include <dt-bindings/pcie/pcie.h> |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "intel,elkhart_lake"; |
| d-cache-line-size = <64>; |
| reg = <0>; |
| }; |
| |
| }; |
| |
| dram0: memory@0 { |
| device_type = "memory"; |
| reg = <0x0 DT_DRAM_SIZE>; |
| }; |
| |
| ibecc: ibecc { |
| compatible = "intel,ibecc"; |
| label = "ibecc"; |
| status = "okay"; |
| }; |
| |
| intc: ioapic@fec00000 { |
| compatible = "intel,ioapic"; |
| reg = <0xfec00000 0x1000>; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| }; |
| |
| pcie0 { |
| label = "PCIE_0"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "intel,pcie"; |
| ranges; |
| |
| ptm_root0: ptm_root@e000 { |
| compatible = "ptm-root"; |
| |
| reg = <PCIE_BDF(0,0x1c,0) PCIE_ID(0x8086,0x4b38)>; |
| label = "PTM_ROOT_0"; |
| |
| status = "okay"; |
| }; |
| |
| uart0: uart@f000 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x1e,0) PCIE_ID(0x8086,0x4b28)>; |
| |
| label = "UART_0"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| uart1: uart@f100 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x1e,1) PCIE_ID(0x8086,0x4b29)>; |
| |
| label = "UART_1"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| uart2: uart@ca00 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x19,2) PCIE_ID(0x8086,0x4b4d)>; |
| |
| label = "UART_2"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| uart_pse_0: uart@8800 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x11,0) PCIE_ID(0x8086,0x4b96)>; |
| |
| label = "UART_PSE_0"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| uart_pse_1: uart@8900 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x11,1) PCIE_ID(0x8086,0x4b97)>; |
| |
| label = "UART_PSE_1"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| uart_pse_2: uart@8a00 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x11,2) PCIE_ID(0x8086,0x4b98)>; |
| |
| label = "UART_PSE_2"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| uart_pse_3: uart@8b00 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x11,3) PCIE_ID(0x8086,0x4b99)>; |
| |
| label = "UART_PSE_3"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| uart_pse_4: uart@8c00 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x11,4) PCIE_ID(0x8086,0x4b9a)>; |
| |
| label = "UART_PSE_4"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| uart_pse_5: uart@8d00 { |
| compatible = "ns16550"; |
| |
| reg = <PCIE_BDF(0,0x11,5) PCIE_ID(0x8086,0x4b9b)>; |
| |
| label = "UART_PSE_5"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| i2c0: i2c@a800 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x15,0) PCIE_ID(0x8086,0x4b78)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_0"; |
| |
| status = "okay"; |
| }; |
| |
| i2c1: i2c@a900 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x15,1) PCIE_ID(0x8086,0x4b79)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_1"; |
| |
| status = "okay"; |
| }; |
| |
| i2c2: i2c@aa00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x15,2) PCIE_ID(0x8086,0x4b7a)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_2"; |
| |
| status = "okay"; |
| }; |
| |
| i2c3: i2c@ab00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x15,3) PCIE_ID(0x8086,0x4b7b)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_3"; |
| |
| status = "okay"; |
| }; |
| |
| i2c4: i2c@c800 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x19,0) PCIE_ID(0x8086,0x4b4b)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_4"; |
| |
| status = "okay"; |
| }; |
| |
| i2c5: i2c@c900 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x19,1) PCIE_ID(0x8086,0x4b4c)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_5"; |
| |
| status = "okay"; |
| }; |
| |
| i2c6: i2c@8000 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x10,0) PCIE_ID(0x8086,0x4b44)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_6"; |
| |
| status = "okay"; |
| }; |
| |
| i2c7: i2c@8100 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x10,1) PCIE_ID(0x8086,0x4b45)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_7"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_0: i2c@d800 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,0) PCIE_ID(0x8086,0x4bb9)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_0"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_1: i2c@d900 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,1) PCIE_ID(0x8086,0x4bba)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_1"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_2: i2c@da00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,2) PCIE_ID(0x8086,0x4bbb)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_2"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_3: i2c@db00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,3) PCIE_ID(0x8086,0x4bbc)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_3"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_4: i2c@dc00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,4) PCIE_ID(0x8086,0x4bbd)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_4"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_5: i2c@dd00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,5) PCIE_ID(0x8086,0x4bbe)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_5"; |
| |
| status = "okay"; |
| }; |
| |
| i2c_pse_6: i2c@de00 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <PCIE_BDF(0,0x1b,6) PCIE_ID(0x8086,0x4bbf)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_PSE_6"; |
| |
| status = "okay"; |
| }; |
| }; |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges; |
| |
| vtd: vtd@fed91000 { |
| compatible = "intel,vt-d"; |
| |
| label = "VTD_0"; |
| reg = <0xfed91000 0x1000>; |
| |
| status = "okay"; |
| }; |
| |
| |
| uart1_fixed: uart@fe040000 { |
| compatible = "ns16550"; |
| |
| reg = <0xfe040000 0x1000>; |
| reg-shift = <0>; |
| |
| label = "UART_1_FIXED"; |
| clock-frequency = <1843200>; |
| interrupts = <3 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| uart2_fixed: uart@fe042000 { |
| compatible = "ns16550"; |
| |
| reg = <0xfe042000 0x1000>; |
| reg-shift = <0>; |
| |
| label = "UART_2_FIXED"; |
| clock-frequency = <1843200>; |
| interrupts = <4 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "disabled"; |
| current-speed = <115200>; |
| }; |
| |
| gpio_0_b: gpio@fd6e0700 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6e0700 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_0_B"; |
| group-index = <0x0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <0>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_0_t: gpio@fd6e08a0 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6e08a0 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_0_T"; |
| group-index = <0x1>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <16>; |
| pin-offset = <26>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_0_g: gpio@fd6e09a0 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6e09a0 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_0_G"; |
| group-index = <0x2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <42>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_1_v: gpio@fd6d0700 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6d0700 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_1_V"; |
| group-index = <0x0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <16>; |
| pin-offset = <0>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_1_h: gpio@fd6d0800 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6d0800 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_1_H"; |
| group-index = <0x1>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <16>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_1_d: gpio@fd6d0980 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6d0980 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_1_D"; |
| group-index = <0x2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <20>; |
| pin-offset = <40>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_1_u: gpio@fd6d0ad0 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6d0ad0 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_1_U"; |
| group-index = <0x3>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <20>; |
| pin-offset = <61>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_1_vG: gpio@fd6d0c50 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6d0c50 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_1_vG"; |
| group-index = <0x4>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <28>; |
| pin-offset = <85>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_3_s: gpio@fd6b0810 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6b0810 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_3_S"; |
| group-index = <0x1>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <2>; |
| pin-offset = <17>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_3_a: gpio@fd6b0830 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6b0830 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_3_A"; |
| group-index = <0x2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <25>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_3_vG: gpio@fd6b09b0 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6b09b0 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_3_vG"; |
| group-index = <0x3>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <4>; |
| pin-offset = <49>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_4_c: gpio@fd6a0700 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6a0700 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_4_C"; |
| group-index = <0x0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <0>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_4_f: gpio@fd6a0880 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6a0880 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_4_F"; |
| group-index = <0x1>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <24>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_4_e: gpio@fd6a0a70 { |
| compatible = "intel,gpio"; |
| reg = <0xfd6a0a70 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_4_E"; |
| group-index = <0x3>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <24>; |
| pin-offset = <57>; |
| |
| status = "okay"; |
| }; |
| |
| gpio_5_r: gpio@fd690700 { |
| compatible = "intel,gpio"; |
| reg = <0xfd690700 0x1000>; |
| interrupts = <14 IRQ_TYPE_LOWEST_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "GPIO_COM_5_R"; |
| group-index = <0x0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| |
| ngpios = <8>; |
| pin-offset = <0>; |
| |
| status = "okay"; |
| }; |
| |
| hpet: hpet@fed00000 { |
| label = "HPET"; |
| compatible = "intel,hpet"; |
| reg = <0xfed00000 0x400>; |
| interrupts = <2 IRQ_TYPE_FIXED_EDGE_RISING 4>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| }; |
| }; |
| }; |
