| /* |
| * Copyright (c) 2019 Vestas Wind Systems A/S |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <arm/armv7-m.dtsi> |
| #include <dt-bindings/clock/kinetis_pcc.h> |
| #include <dt-bindings/clock/kinetis_scg.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| |
| / { |
| aliases { |
| rtc-0 = &rtc0; |
| wdt-0 = &wdog0; |
| uart-0 = &uart0; |
| uart-1 = &uart1; |
| uart-2 = &uart2; |
| i2c-0 = &i2c0; |
| i2c-1 = &i2c1; |
| spi-0 = &spi0; |
| spi-1 = &spi1; |
| pinmux-a = &pinmux_a; |
| pinmux-b = &pinmux_b; |
| pinmux-c = &pinmux_c; |
| pinmux-d = &pinmux_d; |
| pinmux-e = &pinmux_e; |
| gpio-a = &gpioa; |
| gpio-b = &gpiob; |
| gpio-c = &gpioc; |
| gpio-d = &gpiod; |
| gpio-e = &gpioe; |
| adc-0 = &adc0; |
| adc-1 = &adc1; |
| adc-2 = &adc2; |
| ftm-0 = &ftm0; |
| ftm-1 = &ftm1; |
| ftm-2 = &ftm2; |
| ftm-3 = &ftm3; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-m4f"; |
| reg = <0>; |
| }; |
| }; |
| |
| soc { |
| mpu: mpu@4000d000 { |
| compatible = "nxp,kinetis-mpu"; |
| reg = <0x4000d000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| sim: sim@40048000 { |
| compatible = "nxp,kinetis-ke1xf-sim"; |
| reg = <0x40048000 0x1000>; |
| label = "SIM"; |
| }; |
| |
| scg: scg@40064000 { |
| compatible = "nxp,kinetis-scg"; |
| reg = <0x40064000 0x1000>; |
| label = "SCG"; |
| #clock-cells = <1>; |
| }; |
| |
| pmc: pmc@4007d000 { |
| reg = <0x4007d000 0x1000>; |
| label = "PMC"; |
| |
| lpo: lpo128k { |
| /* LPO clock */ |
| compatible = "fixed-clock"; |
| clock-frequency = <125000>; |
| #clock-cells = <0>; |
| }; |
| }; |
| |
| pcc: pcc@40065000 { |
| compatible = "nxp,kinetis-pcc"; |
| reg = <0x40065000 0x1000>; |
| label = "PCC"; |
| #clock-cells = <2>; |
| }; |
| |
| rtc0: rtc@4003d000 { |
| compatible = "nxp,kinetis-rtc"; |
| reg = <0x4003d000 0x1000>; |
| interrupts = <46 0>, <47 0>; |
| interrupt-names = "alarm", "seconds"; |
| clock-frequency = <32768>; |
| prescaler = <32768>; |
| label = "RTC_0"; |
| }; |
| |
| wdog0: watchdog@40052000 { |
| compatible = "nxp,kinetis-wdog32"; |
| reg = <0x40052000 0x1000>; |
| interrupts = <22 0>; |
| clocks = <&lpo>; |
| clk-source = <1>; |
| clk-divider = <256>; |
| label = "WDT_0"; |
| }; |
| |
| flash_controller: flash-controller@40020000 { |
| compatible = "nxp,kinetis-ftfe"; |
| label = "FLASH_CTRL"; |
| reg = <0x40020000 0x1000>; |
| interrupts = <18 0>, <19 0>; |
| interrupt-names = "command-complete", "read-collision"; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| }; |
| |
| uart0: uart@4006a000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4006a000 0x1000>; |
| interrupts = <31 0>, <32 0>; |
| interrupt-names = "transmit", "receive"; |
| clocks = <&pcc 0x1a8 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "UART_0"; |
| status = "disabled"; |
| }; |
| |
| uart1: uart@4006b000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4006b000 0x1000>; |
| interrupts = <33 0>, <34 0>; |
| interrupt-names = "transmit", "receive"; |
| clocks = <&pcc 0x1ac KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "UART_1"; |
| status = "disabled"; |
| }; |
| |
| uart2: uart@4006c000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x4006c000 0x1000>; |
| interrupts = <35 0>, <36 0>; |
| interrupt-names = "transmit", "receive"; |
| clocks = <&pcc 0x1b0 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "UART_2"; |
| status = "disabled"; |
| }; |
| |
| i2c0: i2c@40066000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40066000 0x1000>; |
| interrupts = <24 0>; |
| clocks = <&pcc 0x198 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "I2C_0"; |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@40067000 { |
| compatible = "nxp,imx-lpi2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40067000 0x1000>; |
| interrupts = <25 0>; |
| clocks = <&pcc 0x19c KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "I2C_1"; |
| status = "disabled"; |
| }; |
| |
| spi0: spi@4002c000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x4002c000 0x1000>; |
| interrupts = <26 0>; |
| clocks = <&pcc 0xb0 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "SPI_0"; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| spi1: spi@4002d000 { |
| compatible = "nxp,imx-lpspi"; |
| reg = <0x4002d000 0x1000>; |
| interrupts = <27 0>; |
| clocks = <&pcc 0xb4 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "SPI_1"; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| can0: can@40024000 { |
| compatible = "nxp,kinetis-flexcan"; |
| reg = <0x40024000 0x1000>; |
| interrupts = <78 0>, <79 0>, <80 0>, <81 0>; |
| interrupt-names = "warning", "error", "wake-up", |
| "mb-0-15"; |
| clocks = <&scg KINETIS_SCG_BUS_CLK>; |
| clk-source = <1>; |
| label = "CAN_0"; |
| sjw = <1>; |
| prop-seg = <1>; |
| phase-seg1 = <3>; |
| phase-seg2 = <2>; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| can1: can@40025000 { |
| compatible = "nxp,kinetis-flexcan"; |
| reg = <0x40025000 0x1000>; |
| interrupts = <85 0>, <86 0>, <87 0>, <88 0>; |
| interrupt-names = "warning", "error", "wake-up", |
| "mb-0-15"; |
| clocks = <&scg KINETIS_SCG_BUS_CLK>; |
| clk-source = <1>; |
| label = "CAN_1"; |
| sjw = <1>; |
| prop-seg = <1>; |
| phase-seg1 = <3>; |
| phase-seg2 = <2>; |
| status = "disabled"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| |
| pinmux_a: pinmux@40049000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x40049000 0x1000>; |
| clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>; |
| }; |
| |
| pinmux_b: pinmux@4004a000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004a000 0x1000>; |
| clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>; |
| }; |
| |
| pinmux_c: pinmux@4004b000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004b000 0x1000>; |
| clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>; |
| }; |
| |
| pinmux_d: pinmux@4004c000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004c000 0x1000>; |
| clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>; |
| }; |
| |
| pinmux_e: pinmux@4004d000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004d000 0x1000>; |
| clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>; |
| }; |
| |
| gpioa: gpio@400ff000 { |
| compatible = "nxp,kinetis-gpio"; |
| reg = <0x400ff000 0x40>; |
| interrupts = <59 2>; |
| label = "GPIO_0"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpiob: gpio@400ff040 { |
| compatible = "nxp,kinetis-gpio"; |
| reg = <0x400ff040 0x40>; |
| interrupts = <60 2>; |
| label = "GPIO_1"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpioc: gpio@400ff080 { |
| compatible = "nxp,kinetis-gpio"; |
| reg = <0x400ff080 0x40>; |
| interrupts = <61 2>; |
| label = "GPIO_2"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpiod: gpio@400ff0c0 { |
| compatible = "nxp,kinetis-gpio"; |
| reg = <0x400ff0c0 0x40>; |
| interrupts = <62 2>; |
| label = "GPIO_3"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpioe: gpio@400ff100 { |
| compatible = "nxp,kinetis-gpio"; |
| reg = <0x400ff100 0x40>; |
| interrupts = <63 2>; |
| label = "GPIO_4"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| adc0: adc@4003b000 { |
| compatible = "nxp,kinetis-adc12"; |
| reg = <0x4003b000 0x1000>; |
| interrupts = <39 0>; |
| clocks = <&pcc 0xec KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "ADC_0"; |
| clk-source = <0>; |
| clk-divider = <1>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| |
| adc1: adc@40027000 { |
| compatible = "nxp,kinetis-adc12"; |
| reg = <0x40027000 0x1000>; |
| interrupts = <73 0>; |
| clocks = <&pcc 0x9c KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "ADC_1"; |
| clk-source = <0>; |
| clk-divider = <1>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| |
| adc2: adc@4003c000 { |
| compatible = "nxp,kinetis-adc12"; |
| reg = <0x4003c000 0x1000>; |
| interrupts = <74 0>; |
| clocks = <&pcc 0xf0 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "ADC_2"; |
| clk-source = <0>; |
| clk-divider = <1>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| |
| ftm0: pwm@40038000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x40038000 0x1000>; |
| interrupts = <42 0>; |
| clocks = <&pcc 0xe0 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "FTM_0"; |
| #pwm-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| ftm1: pwm@40039000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x40039000 0x1000>; |
| interrupts = <43 0>; |
| clocks = <&pcc 0xe4 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "FTM_1"; |
| #pwm-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| ftm2: pwm@4003a000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x4003a000 0x1000>; |
| interrupts = <44 0>; |
| clocks = <&pcc 0xe8 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "FTM_2"; |
| #pwm-cells = <2>; |
| status = "disabled"; |
| }; |
| |
| ftm3: pwm@40026000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x40026000 0x1000>; |
| interrupts = <71 0>; |
| clocks = <&pcc 0x98 KINETIS_PCC_SRC_FIRC_ASYNC>; |
| label = "FTM_3"; |
| #pwm-cells = <2>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <4>; |
| }; |