blob: 640e090005d901f918811103ccc55ae67d24af9a [file] [log] [blame]
# Nordic Semiconductor nRF54 MCU line
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_NRF54LX
select HAS_NRFX
select HAS_NORDIC_DRIVERS
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
config SOC_NRF54L15_ENGA_CPUAPP
select ARM
select ARMV8_M_DSP
select CPU_CORTEX_M33
select CPU_HAS_ARM_MPU
select CPU_HAS_ICACHE
select CPU_HAS_ARM_SAU
select CPU_HAS_FPU
select HAS_HW_NRF_RADIO_IEEE802154
select HAS_POWEROFF
if SOC_SERIES_NRF54LX
config SOC_NRF54LX_SKIP_CLOCK_CONFIG
bool "Skip clock frequency configuration in system initialization"
help
With this option, the CPU clock frequency is not set during system initialization.
The CPU runs with the default, hardware-selected frequency.
config SOC_NRF54LX_DISABLE_FICR_TRIMCNF
bool "Disable trimming of the device"
default y if TRUSTED_EXECUTION_NONSECURE
help
Disable trimming of the device. When the device is trimmed it
will copy all the trimming values from FICR into the target
addresses.
config SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE
bool "Skip disabling glitch detector"
default y if TRUSTED_EXECUTION_NONSECURE
help
With this option, the glitch detector is not disabled during system initialization.
The CPU runs with the default state of glitch detector.
config SOC_NRF_FORCE_CONSTLAT
bool "Force constant-latency mode"
help
In constant latency mode the CPU wakeup latency and the PPI task response
will be constant and kept at a minimum. This is secured by forcing a set
of base resources on while in sleep. The advantage of having a constant
and predictable latency will be at the cost of having increased power consumption.
config SOC_NRF54L_VREG_MAIN_DCDC
bool "NRF54L DC/DC converter."
help
To enable, an inductor must be connected to the DC/DC converter pin.
config SOC_NRF54L_NORMAL_VOLTAGE_MODE
bool "NRF54L Normal Voltage Mode."
if NRF_GRTC_TIMER
config ELV_GRTC_LFXO_ALLOWED
bool
depends on NRF_GRTC_SLEEP_ALLOWED
select EXPERIMENTAL
help
This feature allows using ELV mode when GRTC operates with the LFXO as
a low-frequency clock source. The LFXO is automatically activated when
preparing to system-off.
WARNING! This feature is EXPERIMENTAL and may brick your device!
endif # NRF_GRTC_TIMER
endif # SOC_SERIES_NRF54LX