| # Copyright (c) 2025-2026 Microchip Technology Inc. |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| title: Microchip SERCOM UART controller |
| |
| description: | |
| Microchip SERCOM UART driver. |
| |
| Group g1 SERCOM UART driver supports following hardware peripherals: |
| - module name="SERCOM" id="U2201" version="3.1.1","5.0.0" |
| |
| compatible: "microchip,sercom-g1-uart" |
| |
| include: |
| - name: uart-controller.yaml |
| - name: pinctrl-device.yaml |
| |
| properties: |
| reg: |
| required: true |
| |
| interrupts: |
| required: true |
| |
| clocks: |
| required: true |
| |
| clock-names: |
| required: true |
| |
| rxpo: |
| type: int |
| required: true |
| description: | |
| Define the receive data (RxD) pin configuration. |
| An enumeration with the following values: |
| |
| +-------+---------------+ |
| | Value | RX Pin | |
| +-------+---------------+ |
| | 0 | SERCOM_PAD[0] | |
| +-------+---------------+ |
| | 1 | SERCOM_PAD[1] | |
| +-------+---------------+ |
| | 2 | SERCOM_PAD[2] | |
| +-------+---------------+ |
| | 3 | SERCOM_PAD[3] | |
| +-------+---------------+ |
| |
| txpo: |
| type: int |
| required: true |
| description: | |
| Transmit Data Pinout. An enumeration with values that depend on the |
| hardware being used. This controls both the transmit pins and if |
| hardware flow control is used. |
| |
| SAMD5/E5: |
| |
| +-------+---------------+---------------+---------------+ |
| | Value | TX Pin | RTS | CTS | |
| +-------+---------------+---------------+---------------+ |
| | 0 | SERCOM_PAD[0] | N/A | N/A | |
| +-------+---------------+---------------+---------------+ |
| | 1 | Reserved | |
| +-------+---------------+---------------+---------------+ |
| | 2 | SERCOM_PAD[0] | SERCOM_PAD[2] | SERCOM_PAD[3] | |
| +-------+---------------+---------------+---------------+ |
| | 3 | SERCOM_PAD[0] | SERCOM_PAD[2] | N/A | |
| +-------+---------------+---------------+---------------+ |
| |
| clock-external: |
| type: boolean |
| description: | |
| select external clock for uart (external clock if true). |
| |
| collision-detection: |
| type: boolean |
| description: | |
| Enable collision detection for half-duplex mode. |
| |
| run-in-standby-en: |
| type: int |
| enum: |
| - 0 |
| - 1 |
| default: 1 |
| description: | |
| This property defines the functionality in standby sleep mode. |
| |
| 0: Generic clock is disabled when ongoing transfer is finished. The device |
| will not wake up on Transfer Complete interrupt unless the appropriate |
| ONDEMAND bits are set in the clocking chain. |
| 1: Wake on Receive Complete interrupt. Generic clock is enabled in all sleep modes. |
| Any interrupt can wake up the device. |
| |
| dmas: |
| description: | |
| Optional TX & RX dma specifiers. |
| |
| Each specifier will have a phandle reference to the dmac controller, |
| the channel number, and peripheral trigger source. |
| |
| For example dmas for TX, RX on SERCOM3 |
| dmas = <&dmac 0 0xb>, <&dmac 0 0xa>; |
| |
| dma-names: |
| description: | |
| Required if the dmas property exists. This should be "rx" and "tx" |
| to match the dmas property. |
| |
| For example |
| dma-names = "rx", "tx"; |