| # Copyright (c) 2020 Intel Corp. |
| # Copyright 2025 NXP |
| # SPDX-License-Identifier: Apache-2.0 |
| # |
| # EDAC configuration options |
| |
| menuconfig EDAC |
| bool "Error Detection and Correction (EDAC) drivers" |
| help |
| Enable Error Detection and Correction (EDAC) driver. |
| |
| if EDAC |
| |
| config EDAC_ERROR_INJECT |
| bool "EDAC Error Injection mechanism" |
| help |
| Enable Error injection capability for test error checking |
| and reporting. Should not be enabled in production system. |
| |
| config EDAC_SHELL |
| bool "EDAC Shell" |
| depends on SHELL |
| help |
| Enable EDAC shell for debugging EDAC. |
| |
| config EDAC_IBECC |
| bool "In-Band ECC (IBECC)" |
| depends on X86 && PCIE |
| help |
| This option selects In-Band ECC (IBECC) IP support. |
| |
| config EDAC_SYNOPSYS |
| bool "Synopsis DDR controller EDAC driver" |
| default y |
| depends on DT_HAS_XLNX_ZYNQMP_DDRC_2_40A_ENABLED |
| help |
| Enable the Synopsys DDR controller EDAC driver. |
| |
| config EDAC_NXP_MECC |
| bool "NXP MECC EDAC driver" |
| default y |
| depends on DT_HAS_NXP_MECC_ENABLED |
| help |
| Enable EDAC driver for NXP Memory ECC Controller (MECC). |
| This driver provides Single Error Correction and Double Error Detection |
| (SEC-DED) ECC functions for On-Chip RAM (OCRAM) access through the |
| standard EDAC interface. |
| |
| source "drivers/edac/Kconfig.mcux_erm" |
| module = EDAC |
| module-str = edac |
| source "subsys/logging/Kconfig.template.log_config" |
| |
| endif #EDAC |
