Ulf Magnusson | bd6e044 | 2019-11-01 13:45:29 +0100 | [diff] [blame] | 1 | # interrupt controller configuration options |
Dirk Brandewie | 526e132 | 2015-06-15 06:20:24 -0700 | [diff] [blame] | 2 | |
Dirk Brandewie | 526e132 | 2015-06-15 06:20:24 -0700 | [diff] [blame] | 3 | # Copyright (c) 2015 Intel Corporation |
David B. Kinder | ac74d8b | 2017-01-18 17:01:01 -0800 | [diff] [blame] | 4 | # SPDX-License-Identifier: Apache-2.0 |
Dirk Brandewie | 526e132 | 2015-06-15 06:20:24 -0700 | [diff] [blame] | 5 | |
Dirk Brandewie | 526e132 | 2015-06-15 06:20:24 -0700 | [diff] [blame] | 6 | menu "Interrupt Controllers" |
| 7 | |
Anas Nashif | 08f8b65 | 2015-06-20 09:26:06 -0400 | [diff] [blame] | 8 | config ARCV2_INTERRUPT_UNIT |
| 9 | bool "ARCv2 Interrupt Unit" |
| 10 | default y |
| 11 | depends on ARC |
| 12 | help |
Anas Nashif | 429c2a4 | 2017-12-13 10:08:21 -0500 | [diff] [blame] | 13 | The ARCv2 interrupt unit has 16 allocated exceptions associated with |
| 14 | vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255. |
| 15 | The interrupt unit is optional in the ARCv2-based processors. When |
| 16 | building a processor, you can configure the processor to include an |
| 17 | interrupt unit. The ARCv2 interrupt unit is highly programmable. |
Maciek Borzecki | 3390767 | 2016-03-14 16:29:46 +0100 | [diff] [blame] | 18 | |
Karol Gugala | 23a5b5d | 2018-06-10 19:02:14 +0200 | [diff] [blame] | 19 | config PLIC |
| 20 | bool "Platform Level Interrupt Controller (PLIC)" |
Jean-Paul Etienne | d7b713e | 2017-03-14 22:16:30 +0100 | [diff] [blame] | 21 | default y |
Henrik Brix Andersen | a2791cc | 2021-08-22 14:32:27 +0200 | [diff] [blame] | 22 | depends on RISCV_HAS_PLIC |
Kumar Gala | 95f78bc | 2019-08-08 23:01:37 -0500 | [diff] [blame] | 23 | select MULTI_LEVEL_INTERRUPTS |
| 24 | select 2ND_LEVEL_INTERRUPTS |
Jean-Paul Etienne | d7b713e | 2017-03-14 22:16:30 +0100 | [diff] [blame] | 25 | help |
Karol Gugala | 23a5b5d | 2018-06-10 19:02:14 +0200 | [diff] [blame] | 26 | Platform Level Interrupt Controller provides support |
| 27 | for external interrupt lines defined by the RISC-V SoC; |
Jean-Paul Etienne | d7b713e | 2017-03-14 22:16:30 +0100 | [diff] [blame] | 28 | |
Olof Kindgren | 754d568 | 2019-10-10 13:51:18 +0200 | [diff] [blame] | 29 | config SWERV_PIC |
| 30 | bool "SweRV EH1 Programmable Interrupt Controller (PIC)" |
Olof Kindgren | 754d568 | 2019-10-10 13:51:18 +0200 | [diff] [blame] | 31 | help |
| 32 | Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU; |
| 33 | |
Filip Kokosinski | b054517 | 2019-03-28 14:44:12 +0100 | [diff] [blame] | 34 | config VEXRISCV_LITEX_IRQ |
| 35 | bool "VexRiscv LiteX Interrupt controller" |
| 36 | depends on SOC_RISCV32_LITEX_VEXRISCV |
| 37 | help |
| 38 | IRQ implementation for LiteX VexRiscv |
| 39 | |
Martin Ã…berg | 1a3784d | 2020-10-16 20:57:21 +0200 | [diff] [blame] | 40 | config LEON_IRQMP |
| 41 | bool "GRLIB IRQMP interrupt controller" |
| 42 | default y |
| 43 | depends on SOC_SPARC_LEON |
| 44 | help |
| 45 | GRLIB IRQMP and IRQAMP |
| 46 | |
Maureen Helm | 41634c8 | 2022-03-11 16:25:41 -0600 | [diff] [blame] | 47 | config INTC_INIT_PRIORITY |
| 48 | int "Interrupt controller init priority" |
| 49 | default KERNEL_INIT_PRIORITY_DEFAULT |
| 50 | help |
| 51 | Interrupt controller device initialization priority. |
| 52 | |
Ruibin Chang | 4b75cf8 | 2021-09-07 13:45:39 +0800 | [diff] [blame] | 53 | module = INTC |
| 54 | module-str = intc |
| 55 | source "subsys/logging/Kconfig.template.log_config" |
| 56 | |
Rajavardhan Gundi | 1e6adba | 2017-12-24 15:18:57 +0530 | [diff] [blame] | 57 | source "drivers/interrupt_controller/Kconfig.multilevel" |
| 58 | |
Tomasz Bursztyka | ff06251 | 2019-12-18 09:42:14 +0100 | [diff] [blame] | 59 | source "drivers/interrupt_controller/Kconfig.loapic" |
| 60 | |
| 61 | source "drivers/interrupt_controller/Kconfig.dw" |
| 62 | |
Cheryl Su | 362eb1c | 2020-09-09 11:36:28 +0800 | [diff] [blame] | 63 | source "drivers/interrupt_controller/Kconfig.it8xxx2" |
| 64 | |
Tomasz Bursztyka | ff06251 | 2019-12-18 09:42:14 +0100 | [diff] [blame] | 65 | source "drivers/interrupt_controller/Kconfig.stm32" |
| 66 | |
Tomasz Bursztyka | 4ada2f6 | 2019-12-18 09:48:56 +0100 | [diff] [blame] | 67 | source "drivers/interrupt_controller/Kconfig.cavs" |
Rajavardhan Gundi | 74016bb | 2017-10-11 22:36:20 +0530 | [diff] [blame] | 68 | |
Marti Bolivar | 58d8afb | 2018-11-25 02:41:38 -0700 | [diff] [blame] | 69 | source "drivers/interrupt_controller/Kconfig.rv32m1" |
| 70 | |
Derek Hageman | 4462069 | 2019-03-01 19:29:07 -0700 | [diff] [blame] | 71 | source "drivers/interrupt_controller/Kconfig.sam0" |
| 72 | |
Stephanos Ioannidis | 11d0f0a | 2019-12-19 12:41:44 +0900 | [diff] [blame] | 73 | source "drivers/interrupt_controller/Kconfig.gic" |
| 74 | |
Mulin Chao | 84d90e4 | 2020-08-13 18:15:25 +0800 | [diff] [blame] | 75 | source "drivers/interrupt_controller/Kconfig.npcx" |
| 76 | |
Tomasz Bursztyka | 557b170 | 2020-10-13 15:22:27 +0200 | [diff] [blame] | 77 | source "drivers/interrupt_controller/Kconfig.intel_vtd" |
| 78 | |
Glauber Maroto Ferreira | 9ae5fd1 | 2021-04-12 16:13:54 -0300 | [diff] [blame] | 79 | source "drivers/interrupt_controller/Kconfig.esp32" |
| 80 | |
Felipe Neves | b97c2da | 2021-08-30 10:04:34 -0300 | [diff] [blame] | 81 | source "drivers/interrupt_controller/Kconfig.esp32c3" |
| 82 | |
Scott Worley | 6b3749d | 2021-07-21 14:12:52 -0400 | [diff] [blame] | 83 | source "drivers/interrupt_controller/Kconfig.xec" |
| 84 | |
TOKITA Hiroshi | 5c7a0ef | 2021-11-15 08:34:11 +0900 | [diff] [blame] | 85 | source "drivers/interrupt_controller/Kconfig.eclic" |
| 86 | |
Gerard Marull-Paretas | 996a708 | 2021-12-07 18:59:00 +0100 | [diff] [blame] | 87 | source "drivers/interrupt_controller/Kconfig.gd32_exti" |
| 88 | |
Dirk Brandewie | 526e132 | 2015-06-15 06:20:24 -0700 | [diff] [blame] | 89 | endmenu |