| # nrfx UART configuration |
| |
| # Copyright (c) 2016 - 2018, Nordic Semiconductor ASA |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| menuconfig UART_NRFX |
| bool "nRF UART nrfx drivers" |
| default y |
| select SERIAL_HAS_DRIVER |
| select SERIAL_SUPPORT_INTERRUPT |
| select SERIAL_SUPPORT_ASYNC |
| depends on SOC_FAMILY_NRF |
| help |
| Enable support for nrfx UART drivers for nRF MCU series. |
| Peripherals with the same instance ID cannot be used together, |
| e.g. UART_0 and UARTE_0. |
| |
| if UART_NRFX |
| |
| |
| # ----------------- port 0 ----------------- |
| choice |
| prompt "UART Port 0 Driver type" |
| optional |
| |
| config UART_0_NRF_UART |
| bool "nRF UART 0" |
| depends on HAS_HW_NRF_UART0 |
| select NRF_UART_PERIPHERAL |
| help |
| Enable nRF UART without EasyDMA on port 0. |
| |
| config UART_0_NRF_UARTE |
| bool "nRF UARTE 0" |
| # In nRF91 Series SoCs, UART peripherals share certain resources with |
| # SPI and TWI peripherals having the same instance number, and therefore |
| # these cannot be used simultaneously. |
| depends on HAS_HW_NRF_UARTE0 && !(SOC_SERIES_NRF91X && (SPI_0 || I2C_0)) |
| select NRF_UARTE_PERIPHERAL |
| help |
| Enable nRF UART with EasyDMA on port 0. |
| endchoice |
| |
| if UART_0_NRF_UART || UART_0_NRF_UARTE |
| |
| config UART_0_INTERRUPT_DRIVEN |
| bool "Enable interrupt support on port 0" |
| depends on UART_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART interrupt support on port 0. |
| |
| config UART_0_ASYNC |
| bool "Enable Asynchronous API support on port 0" |
| depends on UART_ASYNC_API && !UART_0_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART Asynchronous API support on port 0. |
| |
| config UART_0_NRF_PARITY_BIT |
| bool "Enable parity bit" |
| help |
| Enable parity bit. |
| |
| config UART_0_NRF_FLOW_CONTROL |
| bool "Enable flow control" |
| help |
| Enable flow control. If selected, additionally two pins, RTS and CTS |
| have to be configured. |
| |
| config UART_0_NRF_TX_BUFFER_SIZE |
| int "Size of RAM buffer" |
| depends on UART_0_NRF_UARTE |
| range 1 65535 |
| default 32 |
| help |
| Size of the transmit buffer for API function: fifo_fill. |
| This value is limited by range of TXD.MAXCNT register for |
| particular SoC. |
| |
| config UART_0_NRF_HW_ASYNC |
| bool "Use hardware RX byte counting" |
| depends on UART_0_NRF_UARTE |
| depends on UART_ASYNC_API |
| help |
| If default driver uses interrupts to count incoming bytes, it is possible |
| that with higher speeds and/or high cpu load some data can be lost. |
| It is recommended to use hardware byte counting in such scenarios. |
| Hardware RX byte counting requires timer instance and one PPI channel |
| |
| config UART_0_NRF_HW_ASYNC_TIMER |
| int "Timer instance" |
| depends on UART_0_NRF_HW_ASYNC |
| |
| config UART_0_GPIO_MANAGEMENT |
| bool "Enable GPIO management on port 0" |
| depends on UART_0_NRF_UARTE && DEVICE_POWER_MANAGEMENT |
| default y |
| help |
| If enabled, the driver will configure the GPIOs used by the uart to |
| their default configuration when device is powered down. The GPIOs |
| will be configured back to correct state when UART is powered up. |
| |
| endif # UART_0_NRF_UART || UART_0_NRF_UARTE |
| |
| # ----------------- port 1 ----------------- |
| config UART_1_NRF_UARTE |
| bool "nRF UARTE 1" |
| # In nRF91 Series SoCs, UART peripherals share certain resources with |
| # SPI and TWI peripherals having the same instance number, and therefore |
| # these cannot be used simultaneously. |
| depends on HAS_HW_NRF_UARTE1 && !(SOC_SERIES_NRF91X && (SPI_1 || I2C_1)) |
| select NRF_UARTE_PERIPHERAL |
| help |
| Enable nRF UART with EasyDMA on port 1. |
| |
| if UART_1_NRF_UARTE |
| |
| config UART_1_INTERRUPT_DRIVEN |
| bool "Enable interrupt support on port 1" |
| depends on UART_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART interrupt support on port 1. |
| |
| config UART_1_ASYNC |
| bool "Enable Asynchronous API support on port 1" |
| depends on UART_ASYNC_API && !UART_1_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART Asynchronous API support on port 1. |
| |
| config UART_1_NRF_PARITY_BIT |
| bool "Enable parity bit" |
| help |
| Enable parity bit. |
| |
| config UART_1_NRF_FLOW_CONTROL |
| bool "Enable flow control" |
| help |
| Enable flow control. If selected, additionally two pins, RTS and CTS |
| have to be configured. |
| |
| config UART_1_NRF_TX_BUFFER_SIZE |
| int "Size of RAM buffer" |
| depends on UART_INTERRUPT_DRIVEN |
| range 1 65535 |
| default 32 |
| help |
| Size of the transmit buffer for API function: fifo_fill. |
| This value is limited by range of TXD.MAXCNT register for |
| particular SoC. |
| |
| config UART_1_NRF_HW_ASYNC |
| bool "Use hardware RX byte counting" |
| depends on UART_1_ASYNC |
| help |
| If default driver uses interrupts to count incoming bytes, it is possible |
| that with higher speeds and/or high cpu load some data can be lost. |
| It is recommended to use hardware byte counting in such scenarios. |
| Hardware RX byte counting requires timer instance and one PPI channel |
| |
| config UART_1_NRF_HW_ASYNC_TIMER |
| int "Timer instance" |
| depends on UART_1_NRF_HW_ASYNC |
| |
| config UART_1_GPIO_MANAGEMENT |
| bool "Enable GPIO management on port 1" |
| depends on DEVICE_POWER_MANAGEMENT |
| default y |
| help |
| If enabled, the driver will configure the GPIOs used by the uart to |
| their default configuration when device is powered down. The GPIOs |
| will be configured back to correct state when UART is powered up. |
| |
| endif # UART_1_NRF_UARTE |
| |
| # ----------------- port 2 ----------------- |
| config UART_2_NRF_UARTE |
| bool "nRF UARTE 2" |
| # In nRF91 Series SoCs, UART peripherals share certain resources with |
| # SPI and TWI peripherals having the same instance number, and therefore |
| # these cannot be used simultaneously. |
| depends on HAS_HW_NRF_UARTE2 && !(SOC_SERIES_NRF91X && (SPI_2 || I2C_2)) |
| select NRF_UARTE_PERIPHERAL |
| help |
| Enable nRF UART with EasyDMA on port 2. |
| |
| if UART_2_NRF_UARTE |
| |
| config UART_2_INTERRUPT_DRIVEN |
| bool "Enable interrupt support on port 2" |
| depends on UART_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART interrupt support on port 2. |
| |
| config UART_2_ASYNC |
| bool "Enable Asynchronous API support on port 2" |
| depends on UART_ASYNC_API && !UART_2_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART Asynchronous API support on port 2. |
| |
| config UART_2_NRF_PARITY_BIT |
| bool "Enable parity bit" |
| help |
| Enable parity bit. |
| |
| config UART_2_NRF_FLOW_CONTROL |
| bool "Enable flow control" |
| help |
| Enable flow control. If selected, additionally two pins, RTS and CTS |
| have to be configured. |
| |
| config UART_2_NRF_TX_BUFFER_SIZE |
| int "Size of RAM buffer" |
| range 1 65535 |
| default 32 |
| help |
| Size of the transmit buffer for API function: fifo_fill. |
| This value is limited by range of TXD.MAXCNT register for |
| particular SoC. |
| |
| config UART_2_NRF_HW_ASYNC |
| bool "Use hardware RX byte counting" |
| depends on UART_2_ASYNC |
| help |
| If default driver uses interrupts to count incoming bytes, it is possible |
| that with higher speeds and/or high cpu load some data can be lost. |
| It is recommended to use hardware byte counting in such scenarios. |
| Hardware RX byte counting requires timer instance and one PPI channel |
| |
| config UART_2_NRF_HW_ASYNC_TIMER |
| int "Timer instance" |
| depends on UART_2_NRF_HW_ASYNC |
| |
| config UART_2_GPIO_MANAGEMENT |
| bool "Enable GPIO management on port 2" |
| depends on DEVICE_POWER_MANAGEMENT |
| default y |
| help |
| If enabled, the driver will configure the GPIOs used by the uart to |
| their default configuration when device is powered down. The GPIOs |
| will be configured back to correct state when UART is powered up. |
| |
| endif # UART_2_NRF_UARTE |
| |
| # ----------------- port 3 ----------------- |
| config UART_3_NRF_UARTE |
| bool "nRF UARTE 3" |
| # In nRF91 Series SoCs, UART peripherals share certain resources with |
| # SPI and TWI peripherals having the same instance number, and therefore |
| # these cannot be used simultaneously. |
| depends on HAS_HW_NRF_UARTE3 && !(SOC_SERIES_NRF91X && (SPI_3 || I2C_3)) |
| select NRF_UARTE_PERIPHERAL |
| help |
| Enable nRF UART with EasyDMA on port 3. |
| |
| if UART_3_NRF_UARTE |
| |
| config UART_3_INTERRUPT_DRIVEN |
| bool "Enable interrupt support on port 3" |
| depends on UART_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART interrupt support on port 3. |
| |
| config UART_3_ASYNC |
| bool "Enable Asynchronous API support on port 3" |
| depends on UART_ASYNC_API && !UART_3_INTERRUPT_DRIVEN |
| default y |
| help |
| This option enables UART Asynchronous API support on port 3. |
| |
| config UART_3_NRF_PARITY_BIT |
| bool "Enable parity bit" |
| help |
| Enable parity bit. |
| |
| config UART_3_NRF_FLOW_CONTROL |
| bool "Enable flow control" |
| help |
| Enable flow control. If selected, additionally two pins, RTS and CTS |
| have to be configured. |
| |
| config UART_3_NRF_TX_BUFFER_SIZE |
| int "Size of RAM buffer" |
| range 1 65535 |
| default 32 |
| help |
| Size of the transmit buffer for API function: fifo_fill. |
| This value is limited by range of TXD.MAXCNT register for |
| particular SoC. |
| |
| config UART_3_NRF_HW_ASYNC |
| bool "Use hardware RX byte counting" |
| depends on UART_3_ASYNC |
| help |
| If default driver uses interrupts to count incoming bytes, it is possible |
| that with higher speeds and/or high cpu load some data can be lost. |
| It is recommended to use hardware byte counting in such scenarios. |
| Hardware RX byte counting requires timer instance and one PPI channel |
| |
| config UART_3_NRF_HW_ASYNC_TIMER |
| int "Timer instance" |
| depends on UART_3_NRF_HW_ASYNC |
| |
| config UART_3_GPIO_MANAGEMENT |
| bool "Enable GPIO management on port 3" |
| depends on DEVICE_POWER_MANAGEMENT |
| default y |
| help |
| If enabled, the driver will configure the GPIOs used by the uart to |
| their default configuration when device is powered down. The GPIOs |
| will be configured back to correct state when UART is powered up. |
| |
| endif # UART_3_NRF_UARTE |
| |
| |
| config NRFX_TIMER0 |
| default y |
| depends on UART_0_NRF_HW_ASYNC_TIMER = 0 || UART_1_NRF_HW_ASYNC_TIMER = 0 || \ |
| UART_3_NRF_HW_ASYNC_TIMER = 0 || UART_2_NRF_HW_ASYNC_TIMER = 0 |
| |
| config NRFX_TIMER1 |
| default y |
| depends on UART_0_NRF_HW_ASYNC_TIMER = 1 || UART_1_NRF_HW_ASYNC_TIMER = 1 || \ |
| UART_3_NRF_HW_ASYNC_TIMER = 1 || UART_2_NRF_HW_ASYNC_TIMER = 1 |
| |
| config NRFX_TIMER2 |
| default y |
| depends on UART_0_NRF_HW_ASYNC_TIMER = 2 || UART_1_NRF_HW_ASYNC_TIMER = 2 || \ |
| UART_3_NRF_HW_ASYNC_TIMER = 2 || UART_2_NRF_HW_ASYNC_TIMER = 2 |
| |
| config NRFX_TIMER3 |
| default y |
| depends on UART_0_NRF_HW_ASYNC_TIMER = 3 || UART_1_NRF_HW_ASYNC_TIMER = 3 || \ |
| UART_3_NRF_HW_ASYNC_TIMER = 3 || UART_2_NRF_HW_ASYNC_TIMER = 3 |
| |
| config NRFX_TIMER4 |
| default y |
| depends on UART_0_NRF_HW_ASYNC_TIMER = 4 || UART_1_NRF_HW_ASYNC_TIMER = 4 || \ |
| UART_3_NRF_HW_ASYNC_TIMER = 4 || UART_2_NRF_HW_ASYNC_TIMER = 4 |
| |
| |
| if UART_0_NRF_HW_ASYNC || UART_1_NRF_HW_ASYNC || UART_2_NRF_HW_ASYNC || UART_3_NRF_HW_ASYNC |
| |
| config NRFX_TIMER |
| default y |
| |
| config NRFX_PPI |
| depends on HAS_HW_NRF_PPI |
| default y |
| |
| config NRFX_DPPI |
| depends on HAS_HW_NRF_DPPIC |
| default y |
| |
| config UARTE_NRF_HW_ASYNC |
| bool |
| default y |
| |
| endif |
| |
| config NRF_UART_PERIPHERAL |
| bool |
| |
| config NRF_UARTE_PERIPHERAL |
| bool |
| |
| endif # UART_NRFX |
