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pigweed / third_party / github / zephyrproject-rtos / zephyr / 43123e77c0bea1f044074f0e1da609d7ed1b74bc / . / drivers / interrupt_controller / Kconfig
blob: 02f11b3571d91eaa73df9d3cff29b14a237229dd [file] [log] [blame]
Ulf Magnussonbd6e0442019-11-01 13:45:29 +0100[diff] [blame]1# interrupt controller configuration options
Dirk Brandewie526e1322015-06-15 06:20:24 -0700[diff] [blame]2
Dirk Brandewie526e1322015-06-15 06:20:24 -0700[diff] [blame]3# Copyright (c) 2015 Intel Corporation
David B. Kinderac74d8b2017-01-18 17:01:01 -0800[diff] [blame]4# SPDX-License-Identifier: Apache-2.0
Dirk Brandewie526e1322015-06-15 06:20:24 -0700[diff] [blame]5
Henrik Brix Andersenc41dd362023-03-27 14:55:23 +0200[diff] [blame]6menu "Interrupt controller drivers"
Dirk Brandewie526e1322015-06-15 06:20:24 -0700[diff] [blame]7
Anas Nashif08f8b652015-06-20 09:26:06 -0400[diff] [blame]8config ARCV2_INTERRUPT_UNIT
9 bool "ARCv2 Interrupt Unit"
10 default y
11 depends on ARC
12 help
Anas Nashif429c2a42017-12-13 10:08:21 -0500[diff] [blame]13 The ARCv2 interrupt unit has 16 allocated exceptions associated with
14 vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255.
15 The interrupt unit is optional in the ARCv2-based processors. When
16 building a processor, you can configure the processor to include an
17 interrupt unit. The ARCv2 interrupt unit is highly programmable.
Maciek Borzecki33907672016-03-14 16:29:46 +0100[diff] [blame]18
Olof Kindgren754d5682019-10-10 13:51:18 +0200[diff] [blame]19config SWERV_PIC
20 bool "SweRV EH1 Programmable Interrupt Controller (PIC)"
Kumar Gala8423f232022-07-22 01:46:51 -0500[diff] [blame]21 default y
22 depends on DT_HAS_SWERV_PIC_ENABLED
Olof Kindgren754d5682019-10-10 13:51:18 +0200[diff] [blame]23 help
Carlo Caione31c5dc22022-07-07 16:27:17 +0200[diff] [blame]24 Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU.
Olof Kindgren754d5682019-10-10 13:51:18 +0200[diff] [blame]25
Filip Kokosinskib0545172019-03-28 14:44:12 +0100[diff] [blame]26config VEXRISCV_LITEX_IRQ
27 bool "VexRiscv LiteX Interrupt controller"
Kumar Gala8423f232022-07-22 01:46:51 -0500[diff] [blame]28 default y
29 depends on DT_HAS_VEXRISCV_INTC0_ENABLED
Filip Kokosinskib0545172019-03-28 14:44:12 +0100[diff] [blame]30 help
31 IRQ implementation for LiteX VexRiscv
32
Martin Åberg1a3784d2020-10-16 20:57:21 +0200[diff] [blame]33config LEON_IRQMP
34 bool "GRLIB IRQMP interrupt controller"
35 default y
Kumar Gala8423f232022-07-22 01:46:51 -0500[diff] [blame]36 depends on DT_HAS_GAISLER_IRQMP_ENABLED
Martin Åberg1a3784d2020-10-16 20:57:21 +0200[diff] [blame]37 help
38 GRLIB IRQMP and IRQAMP
39
Maureen Helm41634c82022-03-11 16:25:41 -0600[diff] [blame]40config INTC_INIT_PRIORITY
41 int "Interrupt controller init priority"
42 default KERNEL_INIT_PRIORITY_DEFAULT
43 help
44 Interrupt controller device initialization priority.
45
Kumar Gala161ca032023-03-30 21:12:19 +0000[diff] [blame]46if MCHP_ECIA_XEC
47
48config XEC_GIRQ_INIT_PRIORITY
49 int "XEX GIRQ Interrupt controller init priority"
50 default 41
51 help
52 XEC GIRQ Interrupt controller device initialization priority.
53 The priority value needs to be greater than INTC_INIT_PRIORITY
54 So that the XEC GIRQ controllers are initialized after the
55 xec_ecia.
56
57endif
58
Ruibin Chang4b75cf82021-09-07 13:45:39 +0800[diff] [blame]59module = INTC
60module-str = intc
61source "subsys/logging/Kconfig.template.log_config"
62
Rajavardhan Gundi1e6adba2017-12-24 15:18:57 +0530[diff] [blame]63source "drivers/interrupt_controller/Kconfig.multilevel"
64
Tomasz Bursztykaff062512019-12-18 09:42:14 +0100[diff] [blame]65source "drivers/interrupt_controller/Kconfig.loapic"
66
67source "drivers/interrupt_controller/Kconfig.dw"
68
Cheryl Su362eb1c2020-09-09 11:36:28 +0800[diff] [blame]69source "drivers/interrupt_controller/Kconfig.it8xxx2"
70
Tomasz Bursztykaff062512019-12-18 09:42:14 +0100[diff] [blame]71source "drivers/interrupt_controller/Kconfig.stm32"
72
Tomasz Bursztyka4ada2f62019-12-18 09:48:56 +0100[diff] [blame]73source "drivers/interrupt_controller/Kconfig.cavs"
Rajavardhan Gundi74016bb2017-10-11 22:36:20 +0530[diff] [blame]74
Marti Bolivar58d8afb2018-11-25 02:41:38 -0700[diff] [blame]75source "drivers/interrupt_controller/Kconfig.rv32m1"
76
Derek Hageman44620692019-03-01 19:29:07 -0700[diff] [blame]77source "drivers/interrupt_controller/Kconfig.sam0"
78
Stephanos Ioannidis11d0f0a2019-12-19 12:41:44 +0900[diff] [blame]79source "drivers/interrupt_controller/Kconfig.gic"
80
Mulin Chao84d90e42020-08-13 18:15:25 +0800[diff] [blame]81source "drivers/interrupt_controller/Kconfig.npcx"
82
Tomasz Bursztyka557b1702020-10-13 15:22:27 +0200[diff] [blame]83source "drivers/interrupt_controller/Kconfig.intel_vtd"
84
Glauber Maroto Ferreira9ae5fd12021-04-12 16:13:54 -0300[diff] [blame]85source "drivers/interrupt_controller/Kconfig.esp32"
86
Felipe Nevesb97c2da2021-08-30 10:04:34 -0300[diff] [blame]87source "drivers/interrupt_controller/Kconfig.esp32c3"
88
Scott Worley6b3749d2021-07-21 14:12:52 -0400[diff] [blame]89source "drivers/interrupt_controller/Kconfig.xec"
90
Carlo Caione31c5dc22022-07-07 16:27:17 +0200[diff] [blame]91source "drivers/interrupt_controller/Kconfig.clic"
TOKITA Hiroshi5c7a0ef2021-11-15 08:34:11 +0900[diff] [blame]92
Gerard Marull-Paretas996a7082021-12-07 18:59:00 +0100[diff] [blame]93source "drivers/interrupt_controller/Kconfig.gd32_exti"
94
Carlo Caione31c5dc22022-07-07 16:27:17 +0200[diff] [blame]95source "drivers/interrupt_controller/Kconfig.plic"
96
Dat Nguyen Duy607358b2022-10-12 14:37:52 +0700[diff] [blame]97source "drivers/interrupt_controller/Kconfig.nxp_s32"
98
Andriy Gelman727e5892022-07-21 14:33:28 -0400[diff] [blame]99source "drivers/interrupt_controller/Kconfig.xmc4xxx"
100
Daniel DeGrasse6f938f32023-04-10 16:30:23 -0500[diff] [blame]101source "drivers/interrupt_controller/Kconfig.nxp_pint"
102
Dirk Brandewie526e1322015-06-15 06:20:24 -0700[diff] [blame]103endmenu