Official ARM version: v4.5 for cm4
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..59e571c
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+#Ignore modules added by the repo script
+Device
+#Ignore IDE generated files
\ No newline at end of file
diff --git a/CMSIS_END_USER_LICENCE_AGREEMENT.pdf b/CMSIS_END_USER_LICENCE_AGREEMENT.pdf
new file mode 100644
index 0000000..c67c867
--- /dev/null
+++ b/CMSIS_END_USER_LICENCE_AGREEMENT.pdf
Binary files differ
diff --git a/CMSIS_END_USER_LICENCE_AGREEMENT.rtf b/CMSIS_END_USER_LICENCE_AGREEMENT.rtf
new file mode 100644
index 0000000..e18d125
--- /dev/null
+++ b/CMSIS_END_USER_LICENCE_AGREEMENT.rtf
@@ -0,0 +1,911 @@
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+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 CMSIS DELIVERABLES}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  AND YOU MAY NOT INSTALL, USE OR COPY THE }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 CMSIS DELIVERABLES}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 .
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93Deliverables\'94
+ means (i) the CMSIS Deliverables; (ii) CMSIS-DAP Specification; (iii) CMSIS-DAP Firmware; and (iv) RDDI DLL.
+\par \'93CMSIS-DAP Specification\'94 means any documentation defining the application programming interface, naming and coding conventions of the Cortex Microcontroller Software Interface Standard Debug Access Port (\'93CMSIS-DAP\'94). }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 \hich\f1 Notwithstanding the foregoing, \'93}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 CMSIS-DAP }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 \hich\f1 Specification\'94\loch\f1  shall not include}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 :}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1  (i) the implementation of other published specifications referenced in th}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\hich\af1\dbch\af37\loch\f1 e}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 CMSIS-DAP }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 Specific\hich\af1\dbch\af37\loch\f1 ation; }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 and }{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 (ii) any enabling technologies that may be necessary to make or use any product or portion}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\hich\af1\dbch\af37\loch\f1 s}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1  thereof that complies with the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\hich\af1\dbch\af37\loch\f1 CMSIS-DAP }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 Specification, but are not themselves expressly set forth in th}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 e}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 
+CMSIS-DAP }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 Specification (e.g. compiler front en\hich\af1\dbch\af37\loch\f1 
+ds, code generators, back ends, libraries or other compiler, assembler or linker technologies; validation or debug software or hardware; applications, operating system or driver software; RISC architecture; }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 and }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1 processor microarchitecture)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\hich\af1\dbch\af37\loch\f1 . }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid4029239 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid11929640 \hich\af1\dbch\af37\loch\f1 CMSIS-DAP Fi\hich\af1\dbch\af37\loch\f1 
+rmware}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'94
+ means the C programming language source code accompanying this Licence which implements the functionality of the application programming interface as defined in the CMSIS-DAP Specification and any updates, patches and modifications ARM may make ava
+ilable under the terms of this Licence.
+\par \'93CMSIS Deliverables\'94 means the following components: (i) CMSIS-CORE; (ii) CMSIS-DRIVER; (iii) CMSIS-DSP; (iv) CMSIS-PACK; (v) CMSIS-RTOS API; and (vi) CMSIS-SVD . 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\tx0\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93CMSIS-CORE
+\'94 means the specification defining the application programming interface, naming and coding conventions for the Cortex-M processor cores.
+\par \'94}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid488451 \hich\af1\dbch\af37\loch\f1 CMSIS-DRIVER}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'94}{\rtlch\fcs1 \af0 \ltrch\fcs0 
+\insrsid14553496 \hich\af37\dbch\af37\loch\f37  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid488451 \hich\af1\dbch\af37\loch\f1 means the specification defining }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\hich\af1\dbch\af37\loch\f1 a generic}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid488451 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 p}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid488451 \hich\af1\dbch\af37\loch\f1 eripheral }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 d}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496\charrsid488451 \hich\af1\dbch\af37\loch\f1 river application programming interface, naming and coding conventions}{\rtlch\fcs1 \af0 \ltrch\fcs0 \insrsid14553496 .
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  \'93CMSIS-DSP\'94
+ means the digital signal process (DSP) library specification defining the application programming interface of a DSP library implementation}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15023647 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\tx0\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid13240697 \hich\af1\dbch\af37\loch\f1 CMSIS-PACK}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'94}{\rtlch\fcs1 \af0 \ltrch\fcs0 
+\insrsid14553496\charrsid13240697 \hich\af37\dbch\af37\loch\f37  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid13240697 \hich\af1\dbch\af37\loch\f1 means the specification defining a software pack file format}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 , verification utility, }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid13240697 \hich\af1\dbch\af37\loch\f1 and the associated XML
+\hich\af1\dbch\af37\loch\f1  schema file}{\rtlch\fcs1 \af0 \ltrch\fcs0 \insrsid14553496\charrsid13240697 .}{\rtlch\fcs1 \af0 \ltrch\fcs0 \insrsid14553496 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93CMSIS-RTOS API\'94
+ means the real-time operating system (RTOS) specification defining a generic application programming interface layer for a RTOS system}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15023647 .}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93CMSIS-SVD\'94 }{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid9306407 means }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+the specification defining the System View Description (SVD), verification utility, }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf17\lang1033\langfe2057\langnp1033\langfenp2057\insrsid14553496\charrsid9306407 and associated XML}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf17\lang1033\langfe2057\langnp1033\langfenp2057\insrsid14553496  schema}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf17\lang1033\langfe2057\langnp1033\langfenp2057\insrsid14553496\charrsid9306407  files. }{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid9306407 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \'93Firmware\'94 means firmware that complies with the CMSIS-DAP Specification. 
+\par \'93RDDI DLL\'94 means the reference implementation of a device driver }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6236778 accompanying this Licence}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  in object code form and any updates, patch
+es and modifications ARM may agree to make available under the terms of this Licence and is used with targets containing microprocessors manufactured or simulated under licence from ARM.                    
+\par \'93Separate Files\'94 means the components }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid10227990 identified}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  in the Schedule.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid3618484 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  
+\par \'93Target Connection Product\'94 means a target connection product that complies with the CMSIS-DAP Specification and is used on or with a target containing microprocessors manufactured or simulated under licence from ARM.                    
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid5577184 \hich\af1\dbch\af37\loch\f1 
+Notwithstanding the foregoing, the Deliverables shall not include: (i) the implementation of other published specifications referenced in the Deliverables; (ii) any enabling technologies that may be necessary to make or use any product or portion thereof 
+\hich\af1\dbch\af37\loch\f1 
+that complies with the Deliverables, but are not themselves expressly set forth in the Deliverables  (e.g. compiler front ends, code generators, back ends, libraries or other compiler, assembler or linker technologies; validation or debug software or hard
+\hich\af1\dbch\af37\loch\f1 w\hich\af1\dbch\af37\loch\f1 
+are; applications, operating system or driver software; RISC architecture; processor microarchitecture); (iii) maskworks and physical layouts of integrated circuit designs; or (iv) RTL or other high level representations of integrated circuit designs.}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par }\pard \ltrpar\qj \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 1. LICENCE GRANTS.
+\par }\pard \ltrpar\qj \li0\ri0\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 1.1}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 CMSIS DELIVERABLES 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 ARM hereby grants to you, subject to the terms and conditions of this Licence, a non-exclusive, non-transferable }{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid1317547 licence, to use and copy the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 CMSIS D}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 eliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 for the purpose of: }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar
+\tx426\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 (i) subject to clause 1.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 5(i)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 , developing, having developed, manufacturing, having manufactured, offering to sell, selling, supplying or otherwise distributing products that comply with the }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 CMSIS D}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 eliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 ; and 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid1317547 (ii) distributing and having distributed (directly or through your customers and authorised distributors) the CMSIS-D}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 eliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid1317547  unmodified, with the products}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135  you have developed under }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Clause 1.1 (i) }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 provided you preserve any copyright notices which are included with the CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  D}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 eliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 . }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par 1.2 CMSIS-DAP SPECIFICATION
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 ARM hereby grants to you, subject to the terms and conditions of this Licence, a non-exclusive, non-transferable licence, to }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid3605578 use and copy the CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 -DAP }{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6386005 Specification}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  for the purposes of:
+\par }\pard \ltrpar\qj \fi-567\li567\ri0\sl276\slmult1\widctlpar\tx567\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin567\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 (a)\tab }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11225765 
+developing, having developed, manufacturing, having manufactured, offering to sell, selling, supplying}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+, distributing or having distributed a Target Connection Product}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ;}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496   
+\par }\pard \ltrpar\qj \fi-567\li567\ri0\sl276\slmult1\widctlpar\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin567\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 (b)\tab }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11225765 developing, having developed, }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 subject to clause 1.5(ii) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11225765 
+offering to sell, selling, supplying}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 , }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11225765 
+distributing}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  or having distributed }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 
+(directly or through your cus\hich\af1\dbch\af37\loch\f1 tomers and authorised distributors) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Firmware to run on a Target Connection Product; and
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 (c)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \tab subject to clause 1.5(ii), }{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 distributing }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 and }{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 having distributed }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 
+(directly or through your customers and authorised distributors) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 the CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 -}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 DAP }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14559761 Specification unmodified}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ,}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14559761  with}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 either or both the}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827  Target Connection Products and Firmware}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 , developed under the licences granted in this Clause 1.2}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar
+\tx426\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par 1.3 CMSIS-DAP FIRMWARE
+\par }\pard \ltrpar\qj \li0\ri0\sl276\slmult1\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 
+\cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ARM hereby grants to you, subject to the terms and conditions of this Licence, a non-exclusive, non-trans\hich\af1\dbch\af37\loch\f1 ferable licence, to: 
+
+\par }\pard \ltrpar\qj \fi-567\li567\ri0\sl276\slmult1\widctlpar
+\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin567\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 (a)\tab }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid10356267 \hich\af1\dbch\af37\loch\f1 use, copy}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid2558325 
+\hich\af1\dbch\af37\loch\f1 , and modify the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 CMSIS-DAP Firmware }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+for the purposes of developing and having developed }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid8745136 firmware to run on}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  a Target Connection Product; and
+\par (b)\tab subject to clause 1.5(ii), offer to sell, selling, }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid5058240 supply}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 , supplying, }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid8745136 distributing}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  or having distributed }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 
+(directly or through your customers and authorised distributors)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  CMSIS-DAP Firmware or any modified version created under Clause 1.3 (a) }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid8745136 in}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6192099  object code form only }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 to run on a Target Connection Product. }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid9913780  }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar
+\tx426\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  1.4 RDDI DLL
+\par }\pard \ltrpar\qj \li0\ri0\sl276\slmult1\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 
+\cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ARM hereby grants to you, subject to the terms and conditions of this Licence, a non-exclusive, non-transferable licence, to: 
+\par }\pard \ltrpar\qj \fi-567\li567\ri0\sl276\slmult1\widctlpar
+\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin567\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 (a)\tab use and copy the RDDI DLL for the purpose }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid13793259 of connecting }{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 a Target Connection Product }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11805076 
+running CMSIS-DAP compatible firmware }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 (either the Firmware or the firmware created pursuant to Clause 1.3) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11805076 to }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 software debug tools installed on }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11805076 a host }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 computer running a Windows platform}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid11805076 ; and}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  
+\par (b)\tab subject to clause 1.5(ii), offer to sell, selling, supplying, distributing or having distributed }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 (directly or 
+\hich\af1\dbch\af37\loch\f1 through your customers and authorised distributors) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 the RDDI DLL in object code form only.  
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar
+\tx426\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid6756135 
+\par }\pard \ltrpar\qj \li0\ri0\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 1.5}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  CONDITIONS ON REDISTRIBUTION}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 
+\cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 (i) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 
+\hich\af1\dbch\af37\loch\f1 If you distribute (directly or through your customers and authorised distributors) the products you have created pursuant \hich\af1\dbch\af37\loch\f1 to Clause 1.1}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 \hich\af1\dbch\af37\loch\f1 (i) you agree: (a) not to use ARM
+\hich\f1 \rquote \loch\f1 s name, logo or trademarks to market any or all of the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid1928237 products created under Clause 1.1 (i); }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 \hich\af1\dbch\af37\loch\f1 (b) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 to }{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 \hich\af1\dbch\af37\loch\f1 pr}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 e}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 \hich\af1\dbch\af37\loch\f1 serve any copyright notices included in the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 CMSIS D}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 eliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 \hich\af1\dbch\af37\loch\f1 ; and (c) to ensure your customers and aut\hich\af1\dbch\af37\loch\f1 horised distributors comply with this Clause 1.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 5(i)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid1928237 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1     
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 
+(ii) If you are authorised and choose to distribute (directly or through your customers and authorised distributors) the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 CMSIS}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 -}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 DAP }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14559761 Specification}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 , }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 Firmware, CMSIS-DAP Firmware or any modified version \hich\af1\dbch\af37\loch\f1 
+thereof, or the RDDI DLL, you agree; (a) to ensure that they are licensed for use with targets containing microprocessors manufactured or simulated under licence from ARM; (b) to preserve any copyright notices which are included with the }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 -}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 DAP }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14559761 Specification}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 , CMSIS-DAP Firmware}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 
+, and include valid copyright notices in; (i) any modified version of the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 CMSIS-DAP Firmware}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ; and (ii) the Firmware; (c) not to use ARM\hich\f1 \rquote \loch\f1 s name, logo or trademarks to market -any or all of the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 -}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid4549827 DAP }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14559761 Specification}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 , Firmware,}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1  CMSI\hich\af1\dbch\af37\loch\f1 
+S-DAP Firmware or any modified version therof, the RDDI DLL or the Target Connection Products; and (d) to ensure your customers and authorised distributors comply with this Clause 1.5(ii).    
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 
+\cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par }\pard \ltrpar\qj \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 2. RESTRICTIONS ON USE OF THE}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  DELIVERABLES
+}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 .
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 
+\cbpat8 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 PERMITTED USERS: The }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+Deliverables }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 shall be used only by you (either a single individual, or single legal entity) your employees, or by your }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 on-site }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 
+bona fide sub-contractors for whose acts and omissions you hereby agree to be responsible to ARM}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  for}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  to the same extent as }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 you are for }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 your employees, and provided always that such sub-contractors}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 :}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  (i) are contractually obligated to use the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+Deliverables }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 only for your benefit}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ;}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  and (i}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 i}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 ) agree to assign all their work product and any rights they create therein in the supply of such work to you.
+\par COPYRIGHT AND RESERVATION OF RIGHTS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14488502 : The }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14488502 
+ are owned by ARM or its licensors and are protected by copyright and other intellectual property laws and international treaties. The }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14488502  are licensed not sold. Except as expressly licensed herein, you acquire no right, title or interest in the }{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14488502 
+ or any intellectual property therein. In no event shall the licences granted herein be construed as granting you, expressly or by implication, estoppels or otherwise, a licence to use any ARM technology except the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid14488502 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 
+\par }\pard \ltrpar\qj \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 3}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . SUPPORT.
+\par ARM is not obligated to support the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables but}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  may do so entirely at ARM's discretion. 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 4}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 NO }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 WARRANT}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Y.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 
+\par YOU AGREE THAT THE }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 DELIVERABLES ARE}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 
+ LICENSED "AS IS", AND THAT ARM EXPRESSLY DISCLA
+IMS ALL REPRESENTATIONS, WARRANTIES, CONDITIONS OR OTHER TERMS, EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF NON-INFRINGEMENT, SATISFACTORY QUALITY, AND FITNESS FOR A PARTICULAR PURPOSE.}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  THE DELIVERABLES MAY CONTAIN ERRORS.  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 5}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . LIMITATION OF LIABILITY.
+\par THE MAXIMUM LIABILITY OF ARM TO YOU IN AGGREGATE FOR ALL CLAIMS MADE AGAINST ARM IN CONTRACT}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ,}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  TORT OR OTHERWISE UNDER OR IN CONNECTION WITH THE SUBJECT MATTER OF THIS LICENCE SHALL NOT EXCEED }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 THE GREATER OF (I) }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 THE TO
+TAL OF SUMS PAID BY YOU TO ARM (IF ANY) FOR THIS LICENCE}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  AND (II) US$10.00}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 .}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+  THE LIMITATIONS, EXCLUSIONS AND DISCLAIMERS IN THIS LICENCE SHALL APPLY TO THE MAXIMUM EXTENT ALLOWED BY APPLICABLE LAW.
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 6
+}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid13830602 \hich\af1\dbch\af37\loch\f1 . THIRD PARTY RIGHTS.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid13830602 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid13830602 \hich\af1\dbch\af37\loch\f1 The Separate Files are delivered su\hich\af1\dbch\af37\loch\f1 \hich\f1 
+bject to and your use is governed by their own separate licence agreements. This Licence does not apply to such Separate Files and they are not included in the term \'93}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\lang1024\langfe1024\noproof\insrsid14553496 \hich\af1\dbch\af37\loch\f1 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\lang1024\langfe1024\noproof\insrsid14553496\charrsid13830602 \loch\af1\dbch\af37\hich\f1 \'94\loch\f1 
+ under this Licence. You agree to comply with all terms and conditions impose\hich\af1\dbch\af37\loch\f1 \hich\f1 d on you in respect of such Separate Files including those identified in the Schedule (\'93\loch\f1 \hich\f1 Third Party Terms\'94\loch\f1 
+).  
+\par \hich\af1\dbch\af37\loch\f1 ARM HEREBY DISCLAIMS ANY AND ALL WARRANTIES EXPRESS OR IMPLIED FROM ANY THIRD PARTIES REGARDING ANY SEPARATE FILES, ANY THIRD PARTY MATERIALS INC\hich\af1\dbch\af37\loch\f1 \hich\f1 
+LUDED IN THE SOFTWARE, ANY THIRD PARTY MATERIALS FROM WHICH THE SOFTWARE IS DERIVED (COLLECTIVELY \'93\loch\f1 \hich\f1 OTHER CODE\'94\loch\f1 
+), AND THE USE OF ANY OR ALL THE OTHER CODE IN CONNECTION WITH THE SOFTWARE, INCLUDING (WITHOUT LIMITATION) ANY WARRANTIES OF SATISFACTORY QUALIT\hich\af1\dbch\af37\loch\f1 Y\hich\af1\dbch\af37\loch\f1  OR FITNESS FOR A PARTICULAR PURPOSE.
+\par \hich\af1\dbch\af37\loch\f1 NO THIRD PARTY LICENSORS OF OTHER CODE SHALL HAVE ANY LIABILITY FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND WHETHER
+\hich\af1\dbch\af37\loch\f1 
+ MADE UNDER CONTRACT, TORT OR OTHER LEGAL THEORY, ARISING IN ANY WAY OUT OF THE USE OR DISTRIBUTION OF THE OTHER CODE OR THE EXERCISE OF ANY RIGHTS GRANTED UNDER EITHER OR BOTH THIS LICENCE AND THE LEGAL TERMS APPLICABLE TO ANY SEPARATE FILES, EVEN IF ADV
+\hich\af1\dbch\af37\loch\f1 I\hich\af1\dbch\af37\loch\f1 SED OF THE POSSIBILITY OF SUCH DAMAGES.
+\par }\pard \ltrpar\qj \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 7}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . U.S. GOVERNMENT END USERS.
+\par US Government Restrictions: Use, duplication, reproduction, release, modification, disclosure or transfer of this commercial product and accompanying documentation is restricted in accordance with the terms of this Licence.
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 8}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . TERM AND TERMINATION.
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 8.1 }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 
+This Licence shall remain in force until terminated }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 in accordance with the terms of Clause 8.2 or Clause 8.3 below}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par 8.2 }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 Without prejudice to any of its other rights if you are in breach of
+ any of the terms and conditions of this Licence then ARM may terminate this Licence immediately upon giving written notice to you}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid7630822 
+.  You may terminate this Licence at any time. }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7106724 \hich\af1\dbch\af37\loch\f1 
+8.3 This Licence shall immediately terminate and shall be unavailable to you i\hich\af1\dbch\af37\loch\f1 
+f you or any party affiliated to you asserts any patents against ARM, ARM affiliates, third parties who have a valid licence from ARM for the Deliverables, or any customers or distributors of any of them based upon a claim that your (or your affiliate) pa
+\hich\af1\dbch\af37\loch\f1 t\hich\af1\dbch\af37\loch\f1 ent is Necessary to implement the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496\charrsid7106724 \hich\af1\dbch\af37\loch\f1 . In this Licence}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 :}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7106724 
+\hich\af1\dbch\af37\loch\f1  (i) "affiliate" means any entity controlling, controlled by or under common control with a party (in fact or in law, via voting securities, management control or otherwise) and "affiliated" s\hich\af1\dbch\af37\loch\f1 
+hall be construed accordingly; (ii) "assert" means to allege infringement in legal or administrative proceedings, or proceedings before any other competent trade, arbitral or international authority; }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 and }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7106724 \hich\af1\dbch\af37\loch\f1 \hich\f1 (iii) \'93\loch\f1 \hich\f1 Necessary\'94\loch\f1 
+ means with respect to any claims o\hich\af1\dbch\af37\loch\f1 f any patent, those claims which, without the appropriate permission of the patent owner, will be infringed when implementing the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\hich\af1\dbch\af37\loch\f1 Deliverables }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7106724 \hich\af1\dbch\af37\loch\f1 because no alternative, commercially reasonable, non-infringing way of implementing the }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 Deliverables }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7106724 \hich\af1\dbch\af37\loch\f1 is known.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496\charrsid5900444 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par }\pard \ltrpar\qj \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 8.4 }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid7630822 Upon termination of this Licence,}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636  you shall stop }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396 
+using the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396 
+ and destroy all copies of the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396  in your possession. The provisions of clauses 5, 6, 7, 8 and 9 shall survive termination of this Licence.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636   
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 9}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 . GENERAL.
+\par This Licence is governed by English Law. Except where ARM agrees otherwise in a written contract signed by you and ARM, this is the only agreement between you and ARM relating to the }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Deliverables}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15280636 
+ and it may only be modified by written agreement between you and ARM. Except a
+s expressly agreed in writing, this Licence may not be modified by purchase orders, advertising or other representation by any person. If any clause or sentence in this Licence is held by a court of law to be illegal or unenforceable the remaining provisi
+o
+ns of this Licence shall not be affected thereby. The failure by ARM to enforce any of the provisions of this Licence, unless waived in writing, shall not constitute a waiver of ARM's rights to enforce such provision or any other provision of this Licence
+ in the future.}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496   This Licence may not be assigned without the prior written consent of ARM.
+\par }\pard \ltrpar\qc \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 \page SCHEDULE
+\par }\pard \ltrpar\qj \li0\ri0\sa240\widctlpar\tx916\tx1832\tx2748\tx3664\tx4580\tx5496\tx6412\tx7328\tx8244\tx9160\tx10076\tx10992\tx11908\tx12824\tx13740\tx14656\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \cbpat8 {
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 Separate Files
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 The }{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396 package }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 also }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396 includes the components}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496  contained in the following directories}{\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396 :}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 
+\par {\listtext\pard\plain\ltrpar \rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\insrsid14553496 \hich\af1\dbch\af0\loch\f1 (a)\tab}}\pard \ltrpar
+\qj \fi-360\li720\ri0\widctlpar\wrapdefault\aspalpha\aspnum\faauto\ls16\adjustright\rin0\lin720\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ./}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 /}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 
+\hich\af1\dbch\af37\loch\f1 DSP_Lib}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1  -  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496\charrsid15098396 
+DSP Library sources and examples}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ; 
+\par {\listtext\pard\plain\ltrpar \rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\insrsid14553496 \hich\af1\dbch\af0\loch\f1 (b)\tab}}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ./}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 CMS\hich\af1\dbch\af37\loch\f1 IS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 /}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 Include}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1  - Header files; 
+\par {\listtext\pard\plain\ltrpar \rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\insrsid14553496 \hich\af1\dbch\af0\loch\f1 (c)\tab}}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ./}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 /}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 
+\hich\af1\dbch\af37\loch\f1 Lib}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1  - }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 
+DSP Library build for various toolchains}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ; 
+\par {\listtext\pard\plain\ltrpar \rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\insrsid14553496 \hich\af1\dbch\af0\loch\f1 (d)\tab}}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 ./}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 CMSIS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 /}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 
+\hich\af1\dbch\af37\loch\f1 RTOS}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1  - }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid7090778 \hich\af1\dbch\af37\loch\f1 
+Header file template for CMSIS-RTOS implementation}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ; and 
+\par {\listtext\pard\plain\ltrpar \rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\insrsid14553496 \hich\af1\dbch\af0\loch\f1 (e)\tab}}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\cf1\lang2057\langfe2057\langfenp2057\insrsid14553496 .}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 /Device - T}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid14488502 \hich\af1\dbch\af37\loch\f1 emplate files and implementations for Cortex-M class processors}{
+\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 . 
+\par }\pard \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par \hich\af1\dbch\af37\loch\f1 All of the above com\hich\af1\dbch\af37\loch\f1 ponents (a\hich\f1 \endash \loch\f1  e) are licensed to you under the terms of the BSD licence, which is incorporated within or alongside the above components.  
+\par }\pard \ltrpar\qj \li284\ri0\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin284\itap0\pararsid14553496 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1   }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 
+\f1\fs18\insrsid14553496\charrsid13975144 \hich\af1\dbch\af37\loch\f1 (f)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1    }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid13975144 
+\hich\af1\dbch\af37\loch\f1 ./CMSIS/Driver \hich\f1 \endash \loch\f1  CMSIS-Driver header files}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid13975144 \hich\af1\dbch\af37\loch\f1   (g)}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1  }{\rtlch\fcs1 \af0 \ltrch\fcs0 \insrsid14553496 
+\hich\af37\dbch\af37\loch\f37  }{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 ./CMSIS/Pack \hich\f1 \endash \loch\f1  Example Device Family Pack}{\rtlch\fcs1 \af0 \ltrch\fcs0 \insrsid14553496\charrsid13975144 
+
+\par }\pard\plain \ltrpar\s32\ql \li0\ri0\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \rtlch\fcs1 \af0\afs21\alang1025 \ltrch\fcs0 \f39\fs21\lang2057\langfe1033\cgrid\langnp2057\langfenp1033 {\rtlch\fcs1 
+\af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496 
+\par The above components (f \endash  g) are licensed to you under the terms of the zlib licence, which is incorporated within or alongside the above components.
+\par 
+\par 
+\par }\pard\plain \ltrpar\qj \li0\ri0\sa200\sl276\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid14553496 \rtlch\fcs1 \af0\afs22\alang1025 \ltrch\fcs0 
+\fs22\lang2057\langfe1033\loch\af37\hich\af37\dbch\af37\cgrid\langnp2057\langfenp1033 {\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid2958685 \hich\af1\dbch\af37\loch\f1 ARM contract reference LEC-PRE-00489}{\rtlch\fcs1 \af1\afs18 
+\ltrch\fcs0 \f1\fs18\insrsid14553496 \hich\af1\dbch\af37\loch\f1 - v4.0}{\rtlch\fcs1 \af1\afs18 \ltrch\fcs0 \f1\fs18\insrsid14553496\charrsid2958685 
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\ No newline at end of file
diff --git a/DSP_Lib/Examples/arm_class_marks_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_class_marks_example/ARM/Abstract.txt
new file mode 100644
index 0000000..14dae71
--- /dev/null
+++ b/DSP_Lib/Examples/arm_class_marks_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_class_marks_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_class_marks_example/ARM/arm_class_marks_example_f32.c b/DSP_Lib/Examples/arm_class_marks_example/ARM/arm_class_marks_example_f32.c
new file mode 100644
index 0000000..d140e26
--- /dev/null
+++ b/DSP_Lib/Examples/arm_class_marks_example/ARM/arm_class_marks_example_f32.c
@@ -0,0 +1,211 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_class_marks_example_f32.c
+*
+* Description:   Example code to calculate Minimum, Maximum
+*                Mean, std and variance of marks obtained in a class
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup ClassMarks Class Marks Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance
+ * and Matrix functions to calculate statistical values of marks obtained in a class.
+ *
+ * \note This example also demonstrates the usage of static initialization.
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects
+ * \li \c max_marks     Maximum of all marks
+ * \li \c min_marks     Minimum of all marks
+ * \li \c mean          Mean of all marks
+ * \li \c var           Variance of the marks
+ * \li \c std           Standard deviation of the marks
+ * \li \c numStudents   Total number of students in the class
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_mat_init_f32()
+ * - arm_mat_mult_f32()
+ * - arm_max_f32()
+ * - arm_min_f32()
+ * - arm_mean_f32()
+ * - arm_std_f32()
+ * - arm_var_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_class_marks_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_class_marks_example_f32.c
+  */
+#include "arm_math.h"
+
+#define USE_STATIC_INIT
+
+ /* ----------------------------------------------------------------------
+** Global defines
+** ------------------------------------------------------------------- */
+
+#define TEST_LENGTH_SAMPLES   (20*4)
+
+/* ----------------------------------------------------------------------
+** List of Marks scored by 20 students for 4 subjects
+** ------------------------------------------------------------------- */
+const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
+{
+  42.000000,  37.000000,  81.000000,  28.000000,
+  83.000000,  72.000000,  36.000000,  38.000000,
+  32.000000,  51.000000,  63.000000,  64.000000,
+  97.000000,  82.000000,  95.000000,  90.000000,
+  66.000000,  51.000000,  54.000000,  42.000000,
+  67.000000,  56.000000,  45.000000,  57.000000,
+  67.000000,  69.000000,  35.000000,  52.000000,
+  29.000000,  81.000000,  58.000000,  47.000000,
+  38.000000,  76.000000, 100.000000,  29.000000,
+  33.000000,  47.000000,  29.000000,  50.000000,
+  34.000000,  41.000000,  61.000000,  46.000000,
+  52.000000,  50.000000,  48.000000,  36.000000,
+  47.000000,  55.000000,  44.000000,  40.000000,
+ 100.000000,  94.000000,  84.000000,  37.000000,
+  32.000000,  71.000000,  47.000000,  77.000000,
+  31.000000,  50.000000,  49.000000,  35.000000,
+  63.000000,  67.000000,  40.000000,  31.000000,
+  29.000000,  68.000000,  61.000000,  38.000000,
+  31.000000,  28.000000,  28.000000,  76.000000,
+  55.000000,  33.000000,  29.000000,  39.000000
+};
+
+
+/* ----------------------------------------------------------------------
+* Number of subjects X 1
+* ------------------------------------------------------------------- */
+const float32_t testUnity_f32[4] =
+{
+  1.000,  1.000,   1.000,  1.000
+};
+
+
+/* ----------------------------------------------------------------------
+** f32 Output buffer
+** ------------------------------------------------------------------- */
+static float32_t testOutput[TEST_LENGTH_SAMPLES];
+
+
+/* ------------------------------------------------------------------
+* Global defines
+*------------------------------------------------------------------- */
+#define   NUMSTUDENTS  20
+#define     NUMSUBJECTS  4
+
+/* ------------------------------------------------------------------
+* Global variables
+*------------------------------------------------------------------- */
+
+ uint32_t    numStudents = 20;
+ uint32_t    numSubjects = 4;
+float32_t    max_marks, min_marks, mean, std, var;
+ uint32_t    student_num;
+
+/* ----------------------------------------------------------------------------------
+* Main f32 test function.  It returns maximum marks secured and student number
+* ------------------------------------------------------------------------------- */
+
+int32_t main()
+{
+
+#ifndef  USE_STATIC_INIT
+
+  arm_matrix_instance_f32 srcA;
+  arm_matrix_instance_f32 srcB;
+  arm_matrix_instance_f32 dstC;
+
+  /* Input and output matrices initializations */
+  arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
+  arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
+  arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
+
+#else
+
+  /* Static Initializations of Input and output matrix sizes and array */
+  arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
+  arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
+  arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
+
+#endif
+
+
+  /* ----------------------------------------------------------------------
+  *Call the Matrix multiplication process function
+  * ------------------------------------------------------------------- */
+  arm_mat_mult_f32(&srcA, &srcB, &dstC);
+
+  /* ----------------------------------------------------------------------
+  ** Call the Max function to calculate max marks among numStudents
+  ** ------------------------------------------------------------------- */
+  arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
+
+  /* ----------------------------------------------------------------------
+  ** Call the Min function to calculate min marks among numStudents
+  ** ------------------------------------------------------------------- */
+  arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
+
+  /* ----------------------------------------------------------------------
+  ** Call the Mean function to calculate mean
+  ** ------------------------------------------------------------------- */
+  arm_mean_f32(testOutput, numStudents, &mean);
+
+  /* ----------------------------------------------------------------------
+  ** Call the std function to calculate standard deviation
+  ** ------------------------------------------------------------------- */
+  arm_std_f32(testOutput, numStudents, &std);
+
+  /* ----------------------------------------------------------------------
+  ** Call the var function to calculate variance
+  ** ------------------------------------------------------------------- */
+  arm_var_f32(testOutput, numStudents, &var);
+
+  while(1);                             /* main function does not return */
+}
diff --git a/DSP_Lib/Examples/arm_class_marks_example/GCC/Abstract.txt b/DSP_Lib/Examples/arm_class_marks_example/GCC/Abstract.txt
new file mode 100644
index 0000000..14dae71
--- /dev/null
+++ b/DSP_Lib/Examples/arm_class_marks_example/GCC/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_class_marks_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_class_marks_example/GCC/arm_class_marks_example_f32.c b/DSP_Lib/Examples/arm_class_marks_example/GCC/arm_class_marks_example_f32.c
new file mode 100644
index 0000000..d140e26
--- /dev/null
+++ b/DSP_Lib/Examples/arm_class_marks_example/GCC/arm_class_marks_example_f32.c
@@ -0,0 +1,211 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_class_marks_example_f32.c
+*
+* Description:   Example code to calculate Minimum, Maximum
+*                Mean, std and variance of marks obtained in a class
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup ClassMarks Class Marks Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates the use the Maximum, Minimum, Mean, Standard Deviation, Variance
+ * and Matrix functions to calculate statistical values of marks obtained in a class.
+ *
+ * \note This example also demonstrates the usage of static initialization.
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testMarks_f32 points to the marks scored by 20 students in 4 subjects
+ * \li \c max_marks     Maximum of all marks
+ * \li \c min_marks     Minimum of all marks
+ * \li \c mean          Mean of all marks
+ * \li \c var           Variance of the marks
+ * \li \c std           Standard deviation of the marks
+ * \li \c numStudents   Total number of students in the class
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_mat_init_f32()
+ * - arm_mat_mult_f32()
+ * - arm_max_f32()
+ * - arm_min_f32()
+ * - arm_mean_f32()
+ * - arm_std_f32()
+ * - arm_var_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_class_marks_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_class_marks_example_f32.c
+  */
+#include "arm_math.h"
+
+#define USE_STATIC_INIT
+
+ /* ----------------------------------------------------------------------
+** Global defines
+** ------------------------------------------------------------------- */
+
+#define TEST_LENGTH_SAMPLES   (20*4)
+
+/* ----------------------------------------------------------------------
+** List of Marks scored by 20 students for 4 subjects
+** ------------------------------------------------------------------- */
+const float32_t testMarks_f32[TEST_LENGTH_SAMPLES] =
+{
+  42.000000,  37.000000,  81.000000,  28.000000,
+  83.000000,  72.000000,  36.000000,  38.000000,
+  32.000000,  51.000000,  63.000000,  64.000000,
+  97.000000,  82.000000,  95.000000,  90.000000,
+  66.000000,  51.000000,  54.000000,  42.000000,
+  67.000000,  56.000000,  45.000000,  57.000000,
+  67.000000,  69.000000,  35.000000,  52.000000,
+  29.000000,  81.000000,  58.000000,  47.000000,
+  38.000000,  76.000000, 100.000000,  29.000000,
+  33.000000,  47.000000,  29.000000,  50.000000,
+  34.000000,  41.000000,  61.000000,  46.000000,
+  52.000000,  50.000000,  48.000000,  36.000000,
+  47.000000,  55.000000,  44.000000,  40.000000,
+ 100.000000,  94.000000,  84.000000,  37.000000,
+  32.000000,  71.000000,  47.000000,  77.000000,
+  31.000000,  50.000000,  49.000000,  35.000000,
+  63.000000,  67.000000,  40.000000,  31.000000,
+  29.000000,  68.000000,  61.000000,  38.000000,
+  31.000000,  28.000000,  28.000000,  76.000000,
+  55.000000,  33.000000,  29.000000,  39.000000
+};
+
+
+/* ----------------------------------------------------------------------
+* Number of subjects X 1
+* ------------------------------------------------------------------- */
+const float32_t testUnity_f32[4] =
+{
+  1.000,  1.000,   1.000,  1.000
+};
+
+
+/* ----------------------------------------------------------------------
+** f32 Output buffer
+** ------------------------------------------------------------------- */
+static float32_t testOutput[TEST_LENGTH_SAMPLES];
+
+
+/* ------------------------------------------------------------------
+* Global defines
+*------------------------------------------------------------------- */
+#define   NUMSTUDENTS  20
+#define     NUMSUBJECTS  4
+
+/* ------------------------------------------------------------------
+* Global variables
+*------------------------------------------------------------------- */
+
+ uint32_t    numStudents = 20;
+ uint32_t    numSubjects = 4;
+float32_t    max_marks, min_marks, mean, std, var;
+ uint32_t    student_num;
+
+/* ----------------------------------------------------------------------------------
+* Main f32 test function.  It returns maximum marks secured and student number
+* ------------------------------------------------------------------------------- */
+
+int32_t main()
+{
+
+#ifndef  USE_STATIC_INIT
+
+  arm_matrix_instance_f32 srcA;
+  arm_matrix_instance_f32 srcB;
+  arm_matrix_instance_f32 dstC;
+
+  /* Input and output matrices initializations */
+  arm_mat_init_f32(&srcA, numStudents, numSubjects, (float32_t *)testMarks_f32);
+  arm_mat_init_f32(&srcB, numSubjects, 1, (float32_t *)testUnity_f32);
+  arm_mat_init_f32(&dstC, numStudents, 1, testOutput);
+
+#else
+
+  /* Static Initializations of Input and output matrix sizes and array */
+  arm_matrix_instance_f32 srcA = {NUMSTUDENTS, NUMSUBJECTS, (float32_t *)testMarks_f32};
+  arm_matrix_instance_f32 srcB = {NUMSUBJECTS, 1, (float32_t *)testUnity_f32};
+  arm_matrix_instance_f32 dstC = {NUMSTUDENTS, 1, testOutput};
+
+#endif
+
+
+  /* ----------------------------------------------------------------------
+  *Call the Matrix multiplication process function
+  * ------------------------------------------------------------------- */
+  arm_mat_mult_f32(&srcA, &srcB, &dstC);
+
+  /* ----------------------------------------------------------------------
+  ** Call the Max function to calculate max marks among numStudents
+  ** ------------------------------------------------------------------- */
+  arm_max_f32(testOutput, numStudents, &max_marks, &student_num);
+
+  /* ----------------------------------------------------------------------
+  ** Call the Min function to calculate min marks among numStudents
+  ** ------------------------------------------------------------------- */
+  arm_min_f32(testOutput, numStudents, &min_marks, &student_num);
+
+  /* ----------------------------------------------------------------------
+  ** Call the Mean function to calculate mean
+  ** ------------------------------------------------------------------- */
+  arm_mean_f32(testOutput, numStudents, &mean);
+
+  /* ----------------------------------------------------------------------
+  ** Call the std function to calculate standard deviation
+  ** ------------------------------------------------------------------- */
+  arm_std_f32(testOutput, numStudents, &std);
+
+  /* ----------------------------------------------------------------------
+  ** Call the var function to calculate variance
+  ** ------------------------------------------------------------------- */
+  arm_var_f32(testOutput, numStudents, &var);
+
+  while(1);                             /* main function does not return */
+}
diff --git a/DSP_Lib/Examples/arm_convolution_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_convolution_example/ARM/Abstract.txt
new file mode 100644
index 0000000..42dce12
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_convolution_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_convolution_example/ARM/arm_convolution_example_f32.c b/DSP_Lib/Examples/arm_convolution_example/ARM/arm_convolution_example_f32.c
new file mode 100644
index 0000000..00b0213
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/ARM/arm_convolution_example_f32.c
@@ -0,0 +1,247 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_convolution_example_f32.c
+*
+* Description:   Example code demonstrating Convolution of two input signals using fft.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup ConvolutionExample Convolution Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex
+ * Multiplication, and Support Functions.
+ *
+ * \par Algorithm:
+ * \par
+ * The convolution theorem states that convolution in the time domain corresponds to
+ * multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of
+ * two signals is equal to the product of their individual Fourier transforms.
+ * The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
+ * \par
+ * Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively,
+ * are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code>
+ * and is a power of 4 as FFT implementation is radix-4.
+ * The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input
+ * signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of
+ * the multiplied result.
+ * \par
+ * This is denoted by the following equations:
+ * <pre> A[k] = FFT(a[n],N)
+ * B[k] = FFT(b[n],N)
+ * conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre>
+ * where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code>
+ * and <code>b[n]</code> respectively.
+ * The length of the convolved signal is <code>(n1+n2-1)</code>.
+ *
+ * \par Block Diagram:
+ * \par
+ * \image html Convolution.gif
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testInputA_f32 points to the first input sequence
+ * \li \c srcALen length of the first input sequence
+ * \li \c testInputB_f32 points to the second input sequence
+ * \li \c srcBLen length of the second input sequence
+ * \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code>
+ * \li \c AxB points to the output array where the product of individual FFTs of inputs is stored.
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_fill_f32()
+ * - arm_copy_f32()
+ * - arm_cfft_radix4_init_f32()
+ * - arm_cfft_radix4_f32()
+ * - arm_cmplx_mult_cmplx_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_convolution_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_convolution_example_f32.c
+  */
+
+#include "arm_math.h"
+#include "math_helper.h"
+
+/* ----------------------------------------------------------------------
+* Defines each of the tests performed
+* ------------------------------------------------------------------- */
+#define MAX_BLOCKSIZE   128
+#define DELTA           (0.000001f)
+#define SNR_THRESHOLD   90
+
+/* ----------------------------------------------------------------------
+* Declare I/O buffers
+* ------------------------------------------------------------------- */
+float32_t Ak[MAX_BLOCKSIZE];        /* Input A */
+float32_t Bk[MAX_BLOCKSIZE];        /* Input B */
+float32_t AxB[MAX_BLOCKSIZE * 2];   /* Output */
+
+/* ----------------------------------------------------------------------
+* Test input data for Floating point Convolution example for 32-blockSize
+* Generated by the MATLAB randn() function
+* ------------------------------------------------------------------- */
+float32_t testInputA_f32[64] =
+{
+  -0.808920,   1.357369,   1.180861,  -0.504544,   1.762637,  -0.703285,
+   1.696966,   0.620571,  -0.151093,  -0.100235,  -0.872382,  -0.403579,
+  -0.860749,  -0.382648,  -1.052338,   0.128113,  -0.646269,   1.093377,
+  -2.209198,   0.471706,   0.408901,   1.266242,   0.598252,   1.176827,
+  -0.203421,   0.213596,  -0.851964,  -0.466958,   0.021841,  -0.698938,
+  -0.604107,   0.461778,  -0.318219,   0.942520,   0.577585,   0.417619,
+   0.614665,   0.563679,  -1.295073,  -0.764437,   0.952194,  -0.859222,
+  -0.618554,  -2.268542,  -1.210592,   1.655853,  -2.627219,  -0.994249,
+  -1.374704,   0.343799,   0.025619,   1.227481,  -0.708031,   0.069355,
+  -1.845228,  -1.570886,   1.010668,  -1.802084,   1.630088,   1.286090,
+  -0.161050,  -0.940794,   0.367961,   0.291907
+
+};
+
+float32_t testInputB_f32[64] =
+{
+   0.933724,   0.046881,   1.316470,   0.438345,   0.332682,   2.094885,
+   0.512081,   0.035546,   0.050894,  -2.320371,   0.168711,  -1.830493,
+  -0.444834,  -1.003242,  -0.531494,  -1.365600,  -0.155420,  -0.757692,
+  -0.431880,  -0.380021,   0.096243,  -0.695835,   0.558850,  -1.648962,
+   0.020369,  -0.363630,   0.887146,   0.845503,  -0.252864,  -0.330397,
+   1.269131,  -1.109295,  -1.027876,   0.135940,   0.116721,  -0.293399,
+  -1.349799,   0.166078,  -0.802201,   0.369367,  -0.964568,  -2.266011,
+   0.465178,   0.651222,  -0.325426,   0.320245,  -0.784178,  -0.579456,
+   0.093374,   0.604778,  -0.048225,   0.376297,  -0.394412,   0.578182,
+  -1.218141,  -1.387326,   0.692462,  -0.631297,   0.153137,  -0.638952,
+  0.635474,   -0.970468,   1.334057,  -0.111370
+};
+
+const float testRefOutput_f32[127] =
+{
+   -0.818943,    1.229484,  -0.533664,    1.016604,   0.341875,  -1.963656,
+    5.171476,    3.478033,   7.616361,    6.648384,   0.479069,   1.792012,
+   -1.295591,   -7.447818,   0.315830,  -10.657445,  -2.483469,  -6.524236,
+   -7.380591,   -3.739005,  -8.388957,    0.184147,  -1.554888,   3.786508,
+   -1.684421,    5.400610,  -1.578126,    7.403361,   8.315999,   2.080267,
+   11.077776,    2.749673,   7.138962,    2.748762,   0.660363,   0.981552,
+    1.442275,    0.552721,  -2.576892,    4.703989,   0.989156,   8.759344,
+   -0.564825,   -3.994680,   0.954710,   -5.014144,   6.592329,   1.599488,
+  -13.979146,   -0.391891,  -4.453369,   -2.311242,  -2.948764,   1.761415,
+   -0.138322,   10.433007,  -2.309103,    4.297153,   8.535523,   3.209462,
+    8.695819,    5.569919,   2.514304,    5.582029,   2.060199,   0.642280,
+    7.024616,    1.686615,  -6.481756,    1.343084,  -3.526451,   1.099073,
+   -2.965764,   -0.173723,  -4.111484,    6.528384,  -6.965658,   1.726291,
+    1.535172,   11.023435,   2.338401,   -4.690188,   1.298210,   3.943885,
+    8.407885,    5.168365,   0.684131,    1.559181,   1.859998,   2.852417,
+    8.574070,   -6.369078,   6.023458,   11.837963,  -6.027632,   4.469678,
+   -6.799093,   -2.674048,   6.250367,   -6.809971,  -3.459360,   9.112410,
+   -2.711621,   -1.336678,   1.564249,   -1.564297,  -1.296760,   8.904013,
+   -3.230109,    6.878013,  -7.819823,    3.369909,  -1.657410,  -2.007358,
+   -4.112825,    1.370685,  -3.420525,   -6.276605,   3.244873,  -3.352638,
+    1.545372,    0.902211,   0.197489,   -1.408732,   0.523390,   0.348440, 0
+};
+
+
+/* ----------------------------------------------------------------------
+* Declare Global variables
+* ------------------------------------------------------------------- */
+uint32_t srcALen = 64;   /* Length of Input A */
+uint32_t srcBLen = 64;   /* Length of Input B */
+uint32_t outLen;         /* Length of convolution output */
+float32_t snr;           /* output SNR */
+
+int32_t main(void)
+{
+  arm_status status;                           /* Status of the example */
+  arm_cfft_radix4_instance_f32 cfft_instance;  /* CFFT Structure instance */
+
+  /* CFFT Structure instance pointer */
+  arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
+      (arm_cfft_radix4_instance_f32*) &cfft_instance;
+
+  /* output length of convolution */
+  outLen = srcALen + srcBLen - 1;
+
+  /* Initialise the fft input buffers with all zeros */
+  arm_fill_f32(0.0,  Ak, MAX_BLOCKSIZE);
+  arm_fill_f32(0.0,  Bk, MAX_BLOCKSIZE);
+
+  /* Copy the input values to the fft input buffers */
+  arm_copy_f32(testInputA_f32,  Ak, MAX_BLOCKSIZE/2);
+  arm_copy_f32(testInputB_f32,  Bk, MAX_BLOCKSIZE/2);
+
+  /* Initialize the CFFT function to compute 64 point fft */
+  status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
+
+  /* Transform input a[n] from time domain to frequency domain A[k] */
+  arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
+  /* Transform input b[n] from time domain to frequency domain B[k] */
+  arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
+
+  /* Complex Multiplication of the two input buffers in frequency domain */
+  arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
+
+  /* Initialize the CIFFT function to compute 64 point ifft */
+  status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
+
+  /* Transform the multiplication output from frequency domain to time domain,
+     that gives the convolved output  */
+  arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
+
+  /* SNR Calculation */
+  snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
+
+  /* Compare the SNR with threshold to test whether the
+     computed output is matched with the reference output values. */
+  if( snr > SNR_THRESHOLD)
+  {
+    status = ARM_MATH_SUCCESS;
+  }
+
+  if( status != ARM_MATH_SUCCESS)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+ /** \endlink */
diff --git a/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.c b/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.c
new file mode 100644
index 0000000..dbf2cfe
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.c
@@ -0,0 +1,458 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0    
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.c
+*
+* Description:	Definition of all helper functions required.  
+*  
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+/* ----------------------------------------------------------------------
+*		Include standard header files  
+* -------------------------------------------------------------------- */
+#include<math.h>
+
+/* ----------------------------------------------------------------------
+*		Include project header files  
+* -------------------------------------------------------------------- */
+#include "math_helper.h"
+
+/** 
+ * @brief  Caluclation of SNR
+ * @param  float* 	Pointer to the reference buffer
+ * @param  float*	Pointer to the test buffer
+ * @param  uint32_t	total number of samples
+ * @return float	SNR
+ * The function Caluclates signal to noise ratio for the reference output 
+ * and test output 
+ */
+
+float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
+{
+  float EnergySignal = 0.0, EnergyError = 0.0;
+  uint32_t i;
+  float SNR;
+  int temp;
+  int *test;
+
+  for (i = 0; i < buffSize; i++)
+    {
+ 	  /* Checking for a NAN value in pRef array */
+	  test =   (int *)(&pRef[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+
+	  /* Checking for a NAN value in pTest array */
+	  test =   (int *)(&pTest[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+      EnergySignal += pRef[i] * pRef[i];
+      EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); 
+    }
+
+	/* Checking for a NAN value in EnergyError */
+	test =   (int *)(&EnergyError);
+    temp =  *test;
+
+    if(temp == 0x7FC00000)
+    {
+  		return(0);
+    }
+	
+
+  SNR = 10 * log10 (EnergySignal / EnergyError);
+
+  return (SNR);
+
+}
+
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q15_t* 	    Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
+                            uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed in q12.20 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point(q12.20) values 
+ */
+
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1048576.0f corresponds to pow(2, 20) */
+      pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 1.0)
+        {
+          pOut[i] = 0x000FFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q15_t* 	Pointer to Ref buffer
+ * @param  q15_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}	
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q31_t* 	Pointer to Ref buffer
+ * @param  q31_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q31 (q31_t * input_buf, 
+								 uint32_t blockSize,
+                                 uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q7 (q7_t * input_buf, 
+								uint32_t blockSize,
+                                uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+
+
+/** 
+ * @brief  Caluclates number of guard bits 
+ * @param  uint32_t 	number of additions
+ * @return none
+ * The function Caluclates the number of guard bits  
+ * depending on the numtaps 
+ */
+
+uint32_t arm_calc_guard_bits (uint32_t num_adds)
+{
+  uint32_t i = 1, j = 0;
+
+  if (num_adds == 1)
+    {
+      return (0);
+    }
+
+  while (i < num_adds)
+    {
+      i = i * 2;
+      j++;
+    }
+
+  return (j);
+}
+
+/** 
+ * @brief  Converts Q15 to floating-point
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ */
+
+void arm_apply_guard_bits (float32_t * pIn, 
+						   uint32_t numSamples, 
+						   uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
+    }
+}
+
+/** 
+ * @brief  Calculates pow(2, numShifts)
+ * @param  uint32_t 	number of shifts
+ * @return pow(2, numShifts)
+ */
+uint32_t arm_calc_2pow(uint32_t numShifts)
+{
+
+  uint32_t i, val = 1;
+
+  for (i = 0; i < numShifts; i++)
+    {
+      val = val * 2;
+    }	
+
+  return(val);
+}
+
+
+
+/** 
+ * @brief  Converts float to fixed q14 
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q14 (float *pIn, q15_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 16384.0f corresponds to pow(2, 14) */
+      pOut[i] = (q15_t) (pIn[i] * 16384.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFF;
+        }
+
+    }
+
+}
+
+ 
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q30 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q29 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 4.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+
+/** 
+ * @brief  Converts float to fixed q28 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q28 (float *pIn, q31_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	/* 268435456.0f corresponds to pow(2, 28) */
+      pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 8.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Clip the float values to +/- 1 
+ * @param  pIn 	input buffer
+ * @param  numSamples 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_clip_f32 (float *pIn, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      if(pIn[i] > 1.0f)
+	  {
+	    pIn[i] = 1.0;
+	  }
+	  else if( pIn[i] < -1.0f)
+	  {
+	    pIn[i] = -1.0;
+	  }
+	       
+    }
+}
+
+
+
+
diff --git a/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.h b/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.h
new file mode 100644
index 0000000..46b0af3
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/ARM/math_helper.h
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.h
+* 
+* Description:	Prototypes of all helper functions required.  
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+
+#include "arm_math.h"
+
+#ifndef MATH_HELPER_H
+#define MATH_HELPER_H
+
+float arm_snr_f32(float *pRef, float *pTest,  uint32_t buffSize);  
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
+void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
+void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_clip_f32(float *pIn, uint32_t numSamples);
+uint32_t arm_calc_guard_bits(uint32_t num_adds);
+void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
+uint32_t arm_calc_2pow(uint32_t guard_bits);
+#endif
+
diff --git a/DSP_Lib/Examples/arm_convolution_example/GCC/Abstract.txt b/DSP_Lib/Examples/arm_convolution_example/GCC/Abstract.txt
new file mode 100644
index 0000000..42dce12
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/GCC/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_convolution_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_convolution_example/GCC/arm_convolution_example_f32.c b/DSP_Lib/Examples/arm_convolution_example/GCC/arm_convolution_example_f32.c
new file mode 100644
index 0000000..00b0213
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/GCC/arm_convolution_example_f32.c
@@ -0,0 +1,247 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_convolution_example_f32.c
+*
+* Description:   Example code demonstrating Convolution of two input signals using fft.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+* -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup ConvolutionExample Convolution Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates the convolution theorem with the use of the Complex FFT, Complex-by-Complex
+ * Multiplication, and Support Functions.
+ *
+ * \par Algorithm:
+ * \par
+ * The convolution theorem states that convolution in the time domain corresponds to
+ * multiplication in the frequency domain. Therefore, the Fourier transform of the convoution of
+ * two signals is equal to the product of their individual Fourier transforms.
+ * The Fourier transform of a signal can be evaluated efficiently using the Fast Fourier Transform (FFT).
+ * \par
+ * Two input signals, <code>a[n]</code> and <code>b[n]</code>, with lengths \c n1 and \c n2 respectively,
+ * are zero padded so that their lengths become \c N, which is greater than or equal to <code>(n1+n2-1)</code>
+ * and is a power of 4 as FFT implementation is radix-4.
+ * The convolution of <code>a[n]</code> and <code>b[n]</code> is obtained by taking the FFT of the input
+ * signals, multiplying the Fourier transforms of the two signals, and taking the inverse FFT of
+ * the multiplied result.
+ * \par
+ * This is denoted by the following equations:
+ * <pre> A[k] = FFT(a[n],N)
+ * B[k] = FFT(b[n],N)
+ * conv(a[n], b[n]) = IFFT(A[k] * B[k], N)</pre>
+ * where <code>A[k]</code> and <code>B[k]</code> are the N-point FFTs of the signals <code>a[n]</code>
+ * and <code>b[n]</code> respectively.
+ * The length of the convolved signal is <code>(n1+n2-1)</code>.
+ *
+ * \par Block Diagram:
+ * \par
+ * \image html Convolution.gif
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testInputA_f32 points to the first input sequence
+ * \li \c srcALen length of the first input sequence
+ * \li \c testInputB_f32 points to the second input sequence
+ * \li \c srcBLen length of the second input sequence
+ * \li \c outLen length of convolution output sequence, <code>(srcALen + srcBLen - 1)</code>
+ * \li \c AxB points to the output array where the product of individual FFTs of inputs is stored.
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_fill_f32()
+ * - arm_copy_f32()
+ * - arm_cfft_radix4_init_f32()
+ * - arm_cfft_radix4_f32()
+ * - arm_cmplx_mult_cmplx_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_convolution_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_convolution_example_f32.c
+  */
+
+#include "arm_math.h"
+#include "math_helper.h"
+
+/* ----------------------------------------------------------------------
+* Defines each of the tests performed
+* ------------------------------------------------------------------- */
+#define MAX_BLOCKSIZE   128
+#define DELTA           (0.000001f)
+#define SNR_THRESHOLD   90
+
+/* ----------------------------------------------------------------------
+* Declare I/O buffers
+* ------------------------------------------------------------------- */
+float32_t Ak[MAX_BLOCKSIZE];        /* Input A */
+float32_t Bk[MAX_BLOCKSIZE];        /* Input B */
+float32_t AxB[MAX_BLOCKSIZE * 2];   /* Output */
+
+/* ----------------------------------------------------------------------
+* Test input data for Floating point Convolution example for 32-blockSize
+* Generated by the MATLAB randn() function
+* ------------------------------------------------------------------- */
+float32_t testInputA_f32[64] =
+{
+  -0.808920,   1.357369,   1.180861,  -0.504544,   1.762637,  -0.703285,
+   1.696966,   0.620571,  -0.151093,  -0.100235,  -0.872382,  -0.403579,
+  -0.860749,  -0.382648,  -1.052338,   0.128113,  -0.646269,   1.093377,
+  -2.209198,   0.471706,   0.408901,   1.266242,   0.598252,   1.176827,
+  -0.203421,   0.213596,  -0.851964,  -0.466958,   0.021841,  -0.698938,
+  -0.604107,   0.461778,  -0.318219,   0.942520,   0.577585,   0.417619,
+   0.614665,   0.563679,  -1.295073,  -0.764437,   0.952194,  -0.859222,
+  -0.618554,  -2.268542,  -1.210592,   1.655853,  -2.627219,  -0.994249,
+  -1.374704,   0.343799,   0.025619,   1.227481,  -0.708031,   0.069355,
+  -1.845228,  -1.570886,   1.010668,  -1.802084,   1.630088,   1.286090,
+  -0.161050,  -0.940794,   0.367961,   0.291907
+
+};
+
+float32_t testInputB_f32[64] =
+{
+   0.933724,   0.046881,   1.316470,   0.438345,   0.332682,   2.094885,
+   0.512081,   0.035546,   0.050894,  -2.320371,   0.168711,  -1.830493,
+  -0.444834,  -1.003242,  -0.531494,  -1.365600,  -0.155420,  -0.757692,
+  -0.431880,  -0.380021,   0.096243,  -0.695835,   0.558850,  -1.648962,
+   0.020369,  -0.363630,   0.887146,   0.845503,  -0.252864,  -0.330397,
+   1.269131,  -1.109295,  -1.027876,   0.135940,   0.116721,  -0.293399,
+  -1.349799,   0.166078,  -0.802201,   0.369367,  -0.964568,  -2.266011,
+   0.465178,   0.651222,  -0.325426,   0.320245,  -0.784178,  -0.579456,
+   0.093374,   0.604778,  -0.048225,   0.376297,  -0.394412,   0.578182,
+  -1.218141,  -1.387326,   0.692462,  -0.631297,   0.153137,  -0.638952,
+  0.635474,   -0.970468,   1.334057,  -0.111370
+};
+
+const float testRefOutput_f32[127] =
+{
+   -0.818943,    1.229484,  -0.533664,    1.016604,   0.341875,  -1.963656,
+    5.171476,    3.478033,   7.616361,    6.648384,   0.479069,   1.792012,
+   -1.295591,   -7.447818,   0.315830,  -10.657445,  -2.483469,  -6.524236,
+   -7.380591,   -3.739005,  -8.388957,    0.184147,  -1.554888,   3.786508,
+   -1.684421,    5.400610,  -1.578126,    7.403361,   8.315999,   2.080267,
+   11.077776,    2.749673,   7.138962,    2.748762,   0.660363,   0.981552,
+    1.442275,    0.552721,  -2.576892,    4.703989,   0.989156,   8.759344,
+   -0.564825,   -3.994680,   0.954710,   -5.014144,   6.592329,   1.599488,
+  -13.979146,   -0.391891,  -4.453369,   -2.311242,  -2.948764,   1.761415,
+   -0.138322,   10.433007,  -2.309103,    4.297153,   8.535523,   3.209462,
+    8.695819,    5.569919,   2.514304,    5.582029,   2.060199,   0.642280,
+    7.024616,    1.686615,  -6.481756,    1.343084,  -3.526451,   1.099073,
+   -2.965764,   -0.173723,  -4.111484,    6.528384,  -6.965658,   1.726291,
+    1.535172,   11.023435,   2.338401,   -4.690188,   1.298210,   3.943885,
+    8.407885,    5.168365,   0.684131,    1.559181,   1.859998,   2.852417,
+    8.574070,   -6.369078,   6.023458,   11.837963,  -6.027632,   4.469678,
+   -6.799093,   -2.674048,   6.250367,   -6.809971,  -3.459360,   9.112410,
+   -2.711621,   -1.336678,   1.564249,   -1.564297,  -1.296760,   8.904013,
+   -3.230109,    6.878013,  -7.819823,    3.369909,  -1.657410,  -2.007358,
+   -4.112825,    1.370685,  -3.420525,   -6.276605,   3.244873,  -3.352638,
+    1.545372,    0.902211,   0.197489,   -1.408732,   0.523390,   0.348440, 0
+};
+
+
+/* ----------------------------------------------------------------------
+* Declare Global variables
+* ------------------------------------------------------------------- */
+uint32_t srcALen = 64;   /* Length of Input A */
+uint32_t srcBLen = 64;   /* Length of Input B */
+uint32_t outLen;         /* Length of convolution output */
+float32_t snr;           /* output SNR */
+
+int32_t main(void)
+{
+  arm_status status;                           /* Status of the example */
+  arm_cfft_radix4_instance_f32 cfft_instance;  /* CFFT Structure instance */
+
+  /* CFFT Structure instance pointer */
+  arm_cfft_radix4_instance_f32 *cfft_instance_ptr =
+      (arm_cfft_radix4_instance_f32*) &cfft_instance;
+
+  /* output length of convolution */
+  outLen = srcALen + srcBLen - 1;
+
+  /* Initialise the fft input buffers with all zeros */
+  arm_fill_f32(0.0,  Ak, MAX_BLOCKSIZE);
+  arm_fill_f32(0.0,  Bk, MAX_BLOCKSIZE);
+
+  /* Copy the input values to the fft input buffers */
+  arm_copy_f32(testInputA_f32,  Ak, MAX_BLOCKSIZE/2);
+  arm_copy_f32(testInputB_f32,  Bk, MAX_BLOCKSIZE/2);
+
+  /* Initialize the CFFT function to compute 64 point fft */
+  status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 0, 1);
+
+  /* Transform input a[n] from time domain to frequency domain A[k] */
+  arm_cfft_radix4_f32(cfft_instance_ptr, Ak);
+  /* Transform input b[n] from time domain to frequency domain B[k] */
+  arm_cfft_radix4_f32(cfft_instance_ptr, Bk);
+
+  /* Complex Multiplication of the two input buffers in frequency domain */
+  arm_cmplx_mult_cmplx_f32(Ak, Bk, AxB, MAX_BLOCKSIZE/2);
+
+  /* Initialize the CIFFT function to compute 64 point ifft */
+  status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 64, 1, 1);
+
+  /* Transform the multiplication output from frequency domain to time domain,
+     that gives the convolved output  */
+  arm_cfft_radix4_f32(cfft_instance_ptr, AxB);
+
+  /* SNR Calculation */
+  snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1);
+
+  /* Compare the SNR with threshold to test whether the
+     computed output is matched with the reference output values. */
+  if( snr > SNR_THRESHOLD)
+  {
+    status = ARM_MATH_SUCCESS;
+  }
+
+  if( status != ARM_MATH_SUCCESS)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+ /** \endlink */
diff --git a/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.c b/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.c
new file mode 100644
index 0000000..dbf2cfe
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.c
@@ -0,0 +1,458 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0    
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.c
+*
+* Description:	Definition of all helper functions required.  
+*  
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+/* ----------------------------------------------------------------------
+*		Include standard header files  
+* -------------------------------------------------------------------- */
+#include<math.h>
+
+/* ----------------------------------------------------------------------
+*		Include project header files  
+* -------------------------------------------------------------------- */
+#include "math_helper.h"
+
+/** 
+ * @brief  Caluclation of SNR
+ * @param  float* 	Pointer to the reference buffer
+ * @param  float*	Pointer to the test buffer
+ * @param  uint32_t	total number of samples
+ * @return float	SNR
+ * The function Caluclates signal to noise ratio for the reference output 
+ * and test output 
+ */
+
+float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
+{
+  float EnergySignal = 0.0, EnergyError = 0.0;
+  uint32_t i;
+  float SNR;
+  int temp;
+  int *test;
+
+  for (i = 0; i < buffSize; i++)
+    {
+ 	  /* Checking for a NAN value in pRef array */
+	  test =   (int *)(&pRef[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+
+	  /* Checking for a NAN value in pTest array */
+	  test =   (int *)(&pTest[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+      EnergySignal += pRef[i] * pRef[i];
+      EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); 
+    }
+
+	/* Checking for a NAN value in EnergyError */
+	test =   (int *)(&EnergyError);
+    temp =  *test;
+
+    if(temp == 0x7FC00000)
+    {
+  		return(0);
+    }
+	
+
+  SNR = 10 * log10 (EnergySignal / EnergyError);
+
+  return (SNR);
+
+}
+
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q15_t* 	    Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
+                            uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed in q12.20 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point(q12.20) values 
+ */
+
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1048576.0f corresponds to pow(2, 20) */
+      pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 1.0)
+        {
+          pOut[i] = 0x000FFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q15_t* 	Pointer to Ref buffer
+ * @param  q15_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}	
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q31_t* 	Pointer to Ref buffer
+ * @param  q31_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q31 (q31_t * input_buf, 
+								 uint32_t blockSize,
+                                 uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q7 (q7_t * input_buf, 
+								uint32_t blockSize,
+                                uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+
+
+/** 
+ * @brief  Caluclates number of guard bits 
+ * @param  uint32_t 	number of additions
+ * @return none
+ * The function Caluclates the number of guard bits  
+ * depending on the numtaps 
+ */
+
+uint32_t arm_calc_guard_bits (uint32_t num_adds)
+{
+  uint32_t i = 1, j = 0;
+
+  if (num_adds == 1)
+    {
+      return (0);
+    }
+
+  while (i < num_adds)
+    {
+      i = i * 2;
+      j++;
+    }
+
+  return (j);
+}
+
+/** 
+ * @brief  Converts Q15 to floating-point
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ */
+
+void arm_apply_guard_bits (float32_t * pIn, 
+						   uint32_t numSamples, 
+						   uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
+    }
+}
+
+/** 
+ * @brief  Calculates pow(2, numShifts)
+ * @param  uint32_t 	number of shifts
+ * @return pow(2, numShifts)
+ */
+uint32_t arm_calc_2pow(uint32_t numShifts)
+{
+
+  uint32_t i, val = 1;
+
+  for (i = 0; i < numShifts; i++)
+    {
+      val = val * 2;
+    }	
+
+  return(val);
+}
+
+
+
+/** 
+ * @brief  Converts float to fixed q14 
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q14 (float *pIn, q15_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 16384.0f corresponds to pow(2, 14) */
+      pOut[i] = (q15_t) (pIn[i] * 16384.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFF;
+        }
+
+    }
+
+}
+
+ 
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q30 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q29 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 4.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+
+/** 
+ * @brief  Converts float to fixed q28 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q28 (float *pIn, q31_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	/* 268435456.0f corresponds to pow(2, 28) */
+      pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 8.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Clip the float values to +/- 1 
+ * @param  pIn 	input buffer
+ * @param  numSamples 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_clip_f32 (float *pIn, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      if(pIn[i] > 1.0f)
+	  {
+	    pIn[i] = 1.0;
+	  }
+	  else if( pIn[i] < -1.0f)
+	  {
+	    pIn[i] = -1.0;
+	  }
+	       
+    }
+}
+
+
+
+
diff --git a/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.h b/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.h
new file mode 100644
index 0000000..46b0af3
--- /dev/null
+++ b/DSP_Lib/Examples/arm_convolution_example/GCC/math_helper.h
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.h
+* 
+* Description:	Prototypes of all helper functions required.  
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+
+#include "arm_math.h"
+
+#ifndef MATH_HELPER_H
+#define MATH_HELPER_H
+
+float arm_snr_f32(float *pRef, float *pTest,  uint32_t buffSize);  
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
+void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
+void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_clip_f32(float *pIn, uint32_t numSamples);
+uint32_t arm_calc_guard_bits(uint32_t num_adds);
+void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
+uint32_t arm_calc_2pow(uint32_t guard_bits);
+#endif
+
diff --git a/DSP_Lib/Examples/arm_dotproduct_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_dotproduct_example/ARM/Abstract.txt
new file mode 100644
index 0000000..0c0fd5d
--- /dev/null
+++ b/DSP_Lib/Examples/arm_dotproduct_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_dotproduct_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_dotproduct_example/ARM/arm_dotproduct_example_f32.c b/DSP_Lib/Examples/arm_dotproduct_example/ARM/arm_dotproduct_example_f32.c
new file mode 100644
index 0000000..4bfe357
--- /dev/null
+++ b/DSP_Lib/Examples/arm_dotproduct_example/ARM/arm_dotproduct_example_f32.c
@@ -0,0 +1,178 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_dotproduct_example_f32.c
+*
+* Description:   Example code computing dot product of two vectors.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup DotproductExample Dot Product Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates the use of the Multiply and Add functions to perform the dot product.
+ * The dot product of two vectors is obtained by multiplying corresponding elements
+ * and summing the products.
+
+ * \par Algorithm:
+ * \par
+ * The two input vectors \c A and \c B with length \c n, are multiplied element-by-element
+ * and then added to obtain dot product.
+ * \par
+ * This is denoted by the following equation:
+ *         <pre>  dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre>
+ *
+ * \par Block Diagram:
+ * \par
+ * \image html dotProduct.gif
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c srcA_buf_f32 points to first input vector
+ * \li \c srcB_buf_f32 points to second input vector
+ * \li \c testOutput   stores dot product of the two input vectors.
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_mult_f32()
+ * - arm_add_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_dotproduct_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_dotproduct_example_f32.c
+  */
+
+#include <math.h>
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+* Defines each of the tests performed
+* ------------------------------------------------------------------- */
+#define MAX_BLOCKSIZE     32
+#define DELTA           (0.000001f)
+
+/* ----------------------------------------------------------------------
+* Test input data for Floating point Dot Product example for 32-blockSize
+* Generated by the MATLAB randn() function
+* ------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+** Test input data of srcA for blockSize 32
+** ------------------------------------------------------------------- */
+float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
+{
+  -0.4325648115282207,  -1.6655843782380970,  0.1253323064748307,
+   0.2876764203585489,  -1.1464713506814637,  1.1909154656429988,
+   1.1891642016521031,  -0.0376332765933176,  0.3272923614086541,
+   0.1746391428209245,  -0.1867085776814394,  0.7257905482933027,
+  -0.5883165430141887,   2.1831858181971011, -0.1363958830865957,
+   0.1139313135208096,   1.0667682113591888,  0.0592814605236053,
+  -0.0956484054836690,  -0.8323494636500225,  0.2944108163926404,
+  -1.3361818579378040,   0.7143245518189522,  1.6235620644462707,
+  -0.6917757017022868,   0.8579966728282626,  1.2540014216025324,
+  -1.5937295764474768,  -1.4409644319010200,  0.5711476236581780,
+  -0.3998855777153632,   0.6899973754643451
+};
+
+/* ----------------------------------------------------------------------
+** Test input data of srcB for blockSize 32
+** ------------------------------------------------------------------- */
+float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
+{
+   1.7491401329284098,  0.1325982188803279,   0.3252281811989881,
+  -0.7938091410349637,  0.3149236145048914,  -0.5272704888029532,
+   0.9322666565031119,  1.1646643544607362,  -2.0456694357357357,
+  -0.6443728590041911,  1.7410657940825480,   0.4867684246821860,
+   1.0488288293660140,  1.4885752747099299,   1.2705014969484090,
+  -1.8561241921210170,  2.1343209047321410,  1.4358467535865909,
+  -0.9173023332875400, -1.1060770780029008,   0.8105708062681296,
+   0.6985430696369063, -0.4015827425012831,   1.2687512030669628,
+  -0.7836083053674872,  0.2132664971465569,   0.7878984786088954,
+   0.8966819356782295, -0.1869172943544062,   1.0131816724341454,
+   0.2484350696132857,  0.0596083377937976
+};
+
+/* Reference dot product output */
+float32_t  refDotProdOut = 5.9273644806352142;
+
+/* ----------------------------------------------------------------------
+* Declare Global variables
+* ------------------------------------------------------------------- */
+float32_t multOutput[MAX_BLOCKSIZE];  /* Intermediate output */
+float32_t testOutput;  /* Final ouput */
+
+arm_status status;   /* Status of the example */
+
+int32_t main(void)
+{
+  uint32_t i;       /* Loop counter */
+  float32_t diff;     /* Difference between reference and test outputs */
+
+  /* Multiplication of two input buffers */
+  arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
+
+  /* Accumulate the multiplication output values to
+     get the dot product of the two inputs */
+  for(i=0; i< MAX_BLOCKSIZE; i++)
+  {
+    arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
+  }
+
+  /* absolute value of difference between ref and test */
+  diff = fabsf(refDotProdOut - testOutput);
+
+  /* Comparison of dot product value with reference */
+  if(diff > DELTA)
+  {
+    status = ARM_MATH_TEST_FAILURE;
+  }
+
+  if( status == ARM_MATH_TEST_FAILURE)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+ /** \endlink */
diff --git a/DSP_Lib/Examples/arm_dotproduct_example/GCC/Abstract.txt b/DSP_Lib/Examples/arm_dotproduct_example/GCC/Abstract.txt
new file mode 100644
index 0000000..0c0fd5d
--- /dev/null
+++ b/DSP_Lib/Examples/arm_dotproduct_example/GCC/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_dotproduct_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_dotproduct_example/GCC/arm_dotproduct_example_f32.c b/DSP_Lib/Examples/arm_dotproduct_example/GCC/arm_dotproduct_example_f32.c
new file mode 100644
index 0000000..4bfe357
--- /dev/null
+++ b/DSP_Lib/Examples/arm_dotproduct_example/GCC/arm_dotproduct_example_f32.c
@@ -0,0 +1,178 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_dotproduct_example_f32.c
+*
+* Description:   Example code computing dot product of two vectors.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup DotproductExample Dot Product Example
+ *
+ * \par Description:
+ * \par
+ * Demonstrates the use of the Multiply and Add functions to perform the dot product.
+ * The dot product of two vectors is obtained by multiplying corresponding elements
+ * and summing the products.
+
+ * \par Algorithm:
+ * \par
+ * The two input vectors \c A and \c B with length \c n, are multiplied element-by-element
+ * and then added to obtain dot product.
+ * \par
+ * This is denoted by the following equation:
+ *         <pre>  dotProduct = A[0] * B[0] + A[1] * B[1] + ... + A[n-1] * B[n-1]</pre>
+ *
+ * \par Block Diagram:
+ * \par
+ * \image html dotProduct.gif
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c srcA_buf_f32 points to first input vector
+ * \li \c srcB_buf_f32 points to second input vector
+ * \li \c testOutput   stores dot product of the two input vectors.
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_mult_f32()
+ * - arm_add_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_dotproduct_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_dotproduct_example_f32.c
+  */
+
+#include <math.h>
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+* Defines each of the tests performed
+* ------------------------------------------------------------------- */
+#define MAX_BLOCKSIZE     32
+#define DELTA           (0.000001f)
+
+/* ----------------------------------------------------------------------
+* Test input data for Floating point Dot Product example for 32-blockSize
+* Generated by the MATLAB randn() function
+* ------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+** Test input data of srcA for blockSize 32
+** ------------------------------------------------------------------- */
+float32_t srcA_buf_f32[MAX_BLOCKSIZE] =
+{
+  -0.4325648115282207,  -1.6655843782380970,  0.1253323064748307,
+   0.2876764203585489,  -1.1464713506814637,  1.1909154656429988,
+   1.1891642016521031,  -0.0376332765933176,  0.3272923614086541,
+   0.1746391428209245,  -0.1867085776814394,  0.7257905482933027,
+  -0.5883165430141887,   2.1831858181971011, -0.1363958830865957,
+   0.1139313135208096,   1.0667682113591888,  0.0592814605236053,
+  -0.0956484054836690,  -0.8323494636500225,  0.2944108163926404,
+  -1.3361818579378040,   0.7143245518189522,  1.6235620644462707,
+  -0.6917757017022868,   0.8579966728282626,  1.2540014216025324,
+  -1.5937295764474768,  -1.4409644319010200,  0.5711476236581780,
+  -0.3998855777153632,   0.6899973754643451
+};
+
+/* ----------------------------------------------------------------------
+** Test input data of srcB for blockSize 32
+** ------------------------------------------------------------------- */
+float32_t srcB_buf_f32[MAX_BLOCKSIZE] =
+{
+   1.7491401329284098,  0.1325982188803279,   0.3252281811989881,
+  -0.7938091410349637,  0.3149236145048914,  -0.5272704888029532,
+   0.9322666565031119,  1.1646643544607362,  -2.0456694357357357,
+  -0.6443728590041911,  1.7410657940825480,   0.4867684246821860,
+   1.0488288293660140,  1.4885752747099299,   1.2705014969484090,
+  -1.8561241921210170,  2.1343209047321410,  1.4358467535865909,
+  -0.9173023332875400, -1.1060770780029008,   0.8105708062681296,
+   0.6985430696369063, -0.4015827425012831,   1.2687512030669628,
+  -0.7836083053674872,  0.2132664971465569,   0.7878984786088954,
+   0.8966819356782295, -0.1869172943544062,   1.0131816724341454,
+   0.2484350696132857,  0.0596083377937976
+};
+
+/* Reference dot product output */
+float32_t  refDotProdOut = 5.9273644806352142;
+
+/* ----------------------------------------------------------------------
+* Declare Global variables
+* ------------------------------------------------------------------- */
+float32_t multOutput[MAX_BLOCKSIZE];  /* Intermediate output */
+float32_t testOutput;  /* Final ouput */
+
+arm_status status;   /* Status of the example */
+
+int32_t main(void)
+{
+  uint32_t i;       /* Loop counter */
+  float32_t diff;     /* Difference between reference and test outputs */
+
+  /* Multiplication of two input buffers */
+  arm_mult_f32(srcA_buf_f32, srcB_buf_f32, multOutput, MAX_BLOCKSIZE);
+
+  /* Accumulate the multiplication output values to
+     get the dot product of the two inputs */
+  for(i=0; i< MAX_BLOCKSIZE; i++)
+  {
+    arm_add_f32(&testOutput, &multOutput[i], &testOutput, 1);
+  }
+
+  /* absolute value of difference between ref and test */
+  diff = fabsf(refDotProdOut - testOutput);
+
+  /* Comparison of dot product value with reference */
+  if(diff > DELTA)
+  {
+    status = ARM_MATH_TEST_FAILURE;
+  }
+
+  if( status == ARM_MATH_TEST_FAILURE)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+ /** \endlink */
diff --git a/DSP_Lib/Examples/arm_fft_bin_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_fft_bin_example/ARM/Abstract.txt
new file mode 100644
index 0000000..f6a7fba
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fft_bin_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_fft_bin_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_fft_bin_example/ARM/arm_fft_bin_data.c b/DSP_Lib/Examples/arm_fft_bin_example/ARM/arm_fft_bin_data.c
new file mode 100644
index 0000000..b5159e5
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fft_bin_example/ARM/arm_fft_bin_data.c
@@ -0,0 +1,308 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*   
+* Project: 	    CMSIS DSP Library   
+* Title:	     	arm_fft_bin_data.c
+*   
+* Description:	 Data file used for example code
+*   
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+Test Input signal contains 10KHz signal + Uniformly distributed white noise
+** ------------------------------------------------------------------- */
+
+float32_t testInput_f32_10khz[2048] = 
+{   
+-0.865129623056441, 	0.000000000000000, 	-2.655020678073846, 	0.000000000000000, 	0.600664612949661, 	0.000000000000000, 	0.080378093886515, 	0.000000000000000, 	
+-2.899160484012034, 	0.000000000000000, 	2.563004262857762, 	0.000000000000000, 	3.078328403304206, 	0.000000000000000, 	0.105906778385130, 	0.000000000000000, 	
+0.048366940168201, 	0.000000000000000, 	-0.145696461188734, 	0.000000000000000, 	-0.023417155362879, 	0.000000000000000, 	2.127729174988954, 	0.000000000000000, 	
+-1.176633086028377, 	0.000000000000000, 	3.690223557991855, 	0.000000000000000, 	-0.622791766173194, 	0.000000000000000, 	0.722837373872203, 	0.000000000000000, 	
+2.739754205367484, 	0.000000000000000, 	-0.062610410524552, 	0.000000000000000, 	-0.891296810967338, 	0.000000000000000, 	-1.845872258871811, 	0.000000000000000, 	
+1.195039415434387, 	0.000000000000000, 	-2.177388969045026, 	0.000000000000000, 	1.078649103637905, 	0.000000000000000, 	2.570976050490193, 	0.000000000000000, 	
+-1.383551403404574, 	0.000000000000000, 	2.392141424058873, 	0.000000000000000, 	2.858002843205065, 	0.000000000000000, 	-3.682433899725536, 	0.000000000000000, 	
+-3.488146646451150, 	0.000000000000000, 	1.323468578888120, 	0.000000000000000, 	-0.099771155430726, 	0.000000000000000, 	1.561168082500454, 	0.000000000000000, 	
+1.025026795103179, 	0.000000000000000, 	0.928841900171200, 	0.000000000000000, 	2.930499509864950, 	0.000000000000000, 	2.013349089766430, 	0.000000000000000, 	
+2.381676148486737, 	0.000000000000000, 	-3.081062307950236, 	0.000000000000000, 	-0.389579115537544, 	0.000000000000000, 	0.181540149166620, 	0.000000000000000, 	
+-2.601953341353208, 	0.000000000000000, 	0.333435137783218, 	0.000000000000000, 	-2.812945856162965, 	0.000000000000000, 	2.649109640172910, 	0.000000000000000, 	
+-1.003963025744654, 	0.000000000000000, 	1.552460768755035, 	0.000000000000000, 	0.088641345335247, 	0.000000000000000, 	-2.519951327113426, 	0.000000000000000, 	
+-4.341348988610527, 	0.000000000000000, 	0.557772429359965, 	0.000000000000000, 	-1.671267412948494, 	0.000000000000000, 	0.733951350960387, 	0.000000000000000, 	
+0.409263788034864, 	0.000000000000000, 	3.566033071952806, 	0.000000000000000, 	1.882565173848352, 	0.000000000000000, 	-1.106017073793287, 	0.000000000000000, 	
+0.154456720778718, 	0.000000000000000, 	-2.513205795512153, 	0.000000000000000, 	0.310978660939421, 	0.000000000000000, 	0.579706500111723, 	0.000000000000000, 	
+0.000086383683251, 	0.000000000000000, 	-1.311866980897721, 	0.000000000000000, 	1.840007477574986, 	0.000000000000000, 	-3.253005768451345, 	0.000000000000000, 	
+1.462584328739432, 	0.000000000000000, 	1.610103610851738, 	0.000000000000000, 	0.761914676858907, 	0.000000000000000, 	0.974541361089834, 	0.000000000000000, 	
+0.686845845885983, 	0.000000000000000, 	1.849153122025191, 	0.000000000000000, 	0.787800410401453, 	0.000000000000000, 	-1.187438909666279, 	0.000000000000000, 	
+-0.754937911044720, 	0.000000000000000, 	0.084373858395232, 	0.000000000000000, 	-2.600269011710521, 	0.000000000000000, 	-0.962982842142644, 	0.000000000000000, 	
+-0.369328108540868, 	0.000000000000000, 	0.810791418361879, 	0.000000000000000, 	3.587016488699641, 	0.000000000000000, 	-0.520776145083723, 	0.000000000000000, 	
+0.640249919627884, 	0.000000000000000, 	1.103122489464969, 	0.000000000000000, 	2.231779881455556, 	0.000000000000000, 	-1.308035392685241, 	0.000000000000000, 	
+0.424070304330106, 	0.000000000000000, 	-0.200383932651189, 	0.000000000000000, 	-2.365526783356541, 	0.000000000000000, 	-0.989114757436628, 	0.000000000000000, 	
+2.770807688959777, 	0.000000000000000, 	-0.444172737462307, 	0.000000000000000, 	0.079760979374078, 	0.000000000000000, 	-0.005199118412183, 	0.000000000000000, 	
+-0.664712668309527, 	0.000000000000000, 	-0.624171857561896, 	0.000000000000000, 	0.537306979007338, 	0.000000000000000, 	-2.575955675497642, 	0.000000000000000, 	
+1.562363235756780, 	0.000000000000000, 	1.814069369848895, 	0.000000000000000, 	-1.293428583392509, 	0.000000000000000, 	-1.026188449495686, 	0.000000000000000, 	
+-2.981771815588717, 	0.000000000000000, 	-4.223468103075124, 	0.000000000000000, 	2.672674782004045, 	0.000000000000000, 	-0.856096801117735, 	0.000000000000000, 	
+0.048517345512563, 	0.000000000000000, 	-0.026860721136222, 	0.000000000000000, 	0.392932277758187, 	0.000000000000000, 	-1.331740855093099, 	0.000000000000000, 	
+-1.894292129477081, 	0.000000000000000, 	-1.425006468460681, 	0.000000000000000, 	-2.721772427617057, 	0.000000000000000, 	-1.616831100216806, 	0.000000000000000, 	
+3.551177651488947, 	0.000000000000000, 	-0.069685667896087, 	0.000000000000000, 	-3.134634907409102, 	0.000000000000000, 	-0.263627598944639, 	0.000000000000000, 	
+-1.650469945991350, 	0.000000000000000, 	-2.203580339374399, 	0.000000000000000, 	-0.872203246123242, 	0.000000000000000, 	1.230782812607287, 	0.000000000000000, 	
+0.257288860093291, 	0.000000000000000, 	1.989083106173137, 	0.000000000000000, 	-1.985638729453261, 	0.000000000000000, 	-1.416185105842892, 	0.000000000000000, 	
+-1.131097688325772, 	0.000000000000000, 	-2.245130805416057, 	0.000000000000000, 	-1.938873996219074, 	0.000000000000000, 	2.043608361562645, 	0.000000000000000, 	
+-0.583727989880841, 	0.000000000000000, 	-1.785266378212929, 	0.000000000000000, 	1.961457586224753, 	0.000000000000000, 	1.139400099963223, 	0.000000000000000, 	
+-1.979519343363991, 	0.000000000000000, 	2.003023322818429, 	0.000000000000000, 	0.229004069076829, 	0.000000000000000, 	3.452808862193135, 	0.000000000000000, 	
+2.882273808365857, 	0.000000000000000, 	-1.549450501844438, 	0.000000000000000, 	-3.283872089931876, 	0.000000000000000, 	-0.327025884099064, 	0.000000000000000, 	
+-0.054979977136430, 	0.000000000000000, 	-1.192280531479012, 	0.000000000000000, 	0.645539328365578, 	0.000000000000000, 	2.300832863404618, 	0.000000000000000, 	
+-1.092951789535240, 	0.000000000000000, 	-1.017368249363773, 	0.000000000000000, 	-0.142673056169787, 	0.000000000000000, 	0.831073544881250, 	0.000000000000000, 	
+-2.314612531587064, 	0.000000000000000, 	-2.221456299106321, 	0.000000000000000, 	0.460261143885226, 	0.000000000000000, 	0.050585301888595, 	0.000000000000000, 	
+0.364373329183988, 	0.000000000000000, 	-1.685956552069538, 	0.000000000000000, 	0.050664512351055, 	0.000000000000000, 	-0.193355783902718, 	0.000000000000000, 	
+-0.158660446046828, 	0.000000000000000, 	2.394156453841953, 	0.000000000000000, 	-1.562965718554525, 	0.000000000000000, 	-2.199750600869900, 	0.000000000000000, 	
+1.544984022381773, 	0.000000000000000, 	-1.988307216807315, 	0.000000000000000, 	-0.628240722541046, 	0.000000000000000, 	-1.436235771505429, 	0.000000000000000, 	
+1.677013691147313, 	0.000000000000000, 	1.600741781678228, 	0.000000000000000, 	-0.757380959134706, 	0.000000000000000, 	-4.784797439515566, 	0.000000000000000, 	
+0.265121462834569, 	0.000000000000000, 	3.862029485934378, 	0.000000000000000, 	2.386823577249430, 	0.000000000000000, 	-3.655779745436893, 	0.000000000000000, 	
+-0.763541621368016, 	0.000000000000000, 	-1.182140388432962, 	0.000000000000000, 	-1.349106114858063, 	0.000000000000000, 	-2.287533624396759, 	0.000000000000000, 	
+-0.028603745188423, 	0.000000000000000, 	-1.353580755934427, 	0.000000000000000, 	0.461602380352937, 	0.000000000000000, 	-0.059599055078928, 	0.000000000000000, 	
+-0.929946734342228, 	0.000000000000000, 	0.065773089295561, 	0.000000000000000, 	1.106565863102982, 	0.000000000000000, 	4.719295086373593, 	0.000000000000000, 	
+-2.108377703544395, 	0.000000000000000, 	-2.226393620240159, 	0.000000000000000, 	1.375668397437521, 	0.000000000000000, 	-0.960772428525443, 	0.000000000000000, 	
+-2.156313465390571, 	0.000000000000000, 	1.126060012375311, 	0.000000000000000, 	2.756485137030720, 	0.000000000000000, 	0.739639690862600, 	0.000000000000000, 	
+3.914769510295006, 	0.000000000000000, 	1.685232785586675, 	0.000000000000000, 	4.079058040970612, 	0.000000000000000, 	-1.174598301660513, 	0.000000000000000, 	
+-2.885776587275580, 	0.000000000000000, 	-0.241073635188767, 	0.000000000000000, 	3.080489872502403, 	0.000000000000000, 	-2.051244183999421, 	0.000000000000000, 	
+0.664330486845139, 	0.000000000000000, 	-1.697798999370016, 	0.000000000000000, 	1.452369423649782, 	0.000000000000000, 	-1.523532831019280, 	0.000000000000000, 	
+0.171981186587481, 	0.000000000000000, 	-4.685274721583927, 	0.000000000000000, 	-1.336175835319380, 	0.000000000000000, 	1.419070770428945, 	0.000000000000000, 	
+-0.035791601713475, 	0.000000000000000, 	2.291937971632081, 	0.000000000000000, 	-1.962559313450293, 	0.000000000000000, 	-4.831595589339301, 	0.000000000000000, 	
+-1.857055284000925, 	0.000000000000000, 	2.606271522635512, 	0.000000000000000, 	-0.576447978738030, 	0.000000000000000, 	0.082299166967720, 	0.000000000000000, 	
+1.888399453494614, 	0.000000000000000, 	-3.564705298046079, 	0.000000000000000, 	-0.939357831083889, 	0.000000000000000, 	-1.903578203697778, 	0.000000000000000, 	
+-2.642492215447250, 	0.000000000000000, 	-0.182990405251017, 	0.000000000000000, 	3.742026478011174, 	0.000000000000000, 	0.104295803798333, 	0.000000000000000, 	
+1.848678195370347, 	0.000000000000000, 	-1.887384346896369, 	0.000000000000000, 	0.365048973046045, 	0.000000000000000, 	-0.889638010354219, 	0.000000000000000, 	
+1.173877118428863, 	0.000000000000000, 	-1.178562827540109, 	0.000000000000000, 	0.610271645685184, 	0.000000000000000, 	1.831284815697871, 	0.000000000000000, 	
+0.449575390102283, 	0.000000000000000, 	1.597171905253443, 	0.000000000000000, 	3.918574971904773, 	0.000000000000000, 	0.868104027970404, 	0.000000000000000, 	
+0.582643134746494, 	0.000000000000000, 	2.321256382353331, 	0.000000000000000, 	-0.238118642223180, 	0.000000000000000, 	-2.890287868054370, 	0.000000000000000, 	
+0.970995414625622, 	0.000000000000000, 	0.666137930891283, 	0.000000000000000, 	-0.202435718709502, 	0.000000000000000, 	2.057930200518194, 	0.000000000000000, 	
+3.120583443719949, 	0.000000000000000, 	-0.863945271701041, 	0.000000000000000, 	0.906848893874630, 	0.000000000000000, 	-1.434124930222570, 	0.000000000000000, 	
+0.754659384848783, 	0.000000000000000, 	-5.224154442713778, 	0.000000000000000, 	2.330229744098967, 	0.000000000000000, 	1.113946320164698, 	0.000000000000000, 	
+0.523324920322840, 	0.000000000000000, 	1.750740911548348, 	0.000000000000000, 	-0.899333972913577, 	0.000000000000000, 	0.228705845203506, 	0.000000000000000, 	
+-1.934782624767648, 	0.000000000000000, 	-3.508386237231303, 	0.000000000000000, 	-2.107108523073510, 	0.000000000000000, 	0.380587645474815, 	0.000000000000000, 	
+-0.476200877183279, 	0.000000000000000, 	-2.172086712642198, 	0.000000000000000, 	1.795372535780299, 	0.000000000000000, 	-2.100318983391055, 	0.000000000000000, 	
+-0.022571122461405, 	0.000000000000000, 	0.674514020010955, 	0.000000000000000, 	-0.148872569390857, 	0.000000000000000, 	0.298175890592737, 	0.000000000000000, 	
+-1.134244492493590, 	0.000000000000000, 	-3.146848422289455, 	0.000000000000000, 	-1.357950199087602, 	0.000000000000000, 	0.667362732020878, 	0.000000000000000, 	
+-3.119397998316724, 	0.000000000000000, 	-1.189341126297637, 	0.000000000000000, 	-1.532744386856668, 	0.000000000000000, 	-1.672972484202534, 	0.000000000000000, 	
+-2.042283373871558, 	0.000000000000000, 	-1.479481547595924, 	0.000000000000000, 	-0.002668662875396, 	0.000000000000000, 	0.262737760129546, 	0.000000000000000, 	
+2.734456080621830, 	0.000000000000000, 	-0.671945925075102, 	0.000000000000000, 	-3.735078262179111, 	0.000000000000000, 	-0.161705013319883, 	0.000000000000000, 	
+0.748963512361001, 	0.000000000000000, 	1.128046374367600, 	0.000000000000000, 	0.649651335592966, 	0.000000000000000, 	1.880020215025867, 	0.000000000000000, 	
+-1.095632293842306, 	0.000000000000000, 	1.197764876160487, 	0.000000000000000, 	0.323646656252985, 	0.000000000000000, 	-1.655502751114502, 	0.000000000000000, 	
+3.666399062961496, 	0.000000000000000, 	-0.334060899735197, 	0.000000000000000, 	-2.119056978738397, 	0.000000000000000, 	3.721375117275012, 	0.000000000000000, 	
+0.044874186872307, 	0.000000000000000, 	-2.733053897593234, 	0.000000000000000, 	1.590700278891042, 	0.000000000000000, 	3.215711772781902, 	0.000000000000000, 	
+-1.792085012843801, 	0.000000000000000, 	-0.405797188885475, 	0.000000000000000, 	-0.628080020080892, 	0.000000000000000, 	-1.831815840843960, 	0.000000000000000, 	
+2.973656862522834, 	0.000000000000000, 	-0.212032655138417, 	0.000000000000000, 	0.372437389437234, 	0.000000000000000, 	-1.614030579023492, 	0.000000000000000, 	
+-0.704900996358698, 	0.000000000000000, 	1.123700273452105, 	0.000000000000000, 	-0.136371848130819, 	0.000000000000000, 	3.020284357635585, 	0.000000000000000, 	
+-0.550211350877649, 	0.000000000000000, 	5.101256236381711, 	0.000000000000000, 	3.367051512192333, 	0.000000000000000, 	-4.385131946669234, 	0.000000000000000, 	
+-3.967303337694391, 	0.000000000000000, 	-0.965894936640022, 	0.000000000000000, 	0.328366945264681, 	0.000000000000000, 	0.199041562924914, 	0.000000000000000, 	
+1.067681999025495, 	0.000000000000000, 	-1.939516091697170, 	0.000000000000000, 	-1.092980954328824, 	0.000000000000000, 	0.273786079368066, 	0.000000000000000, 	
+-0.040928322190265, 	0.000000000000000, 	-0.118368078577437, 	0.000000000000000, 	1.766589628899997, 	0.000000000000000, 	1.738321311635393, 	0.000000000000000, 	
+-2.895012794321649, 	0.000000000000000, 	1.213521771395142, 	0.000000000000000, 	0.922971726633985, 	0.000000000000000, 	1.091516563636489, 	0.000000000000000, 	
+3.226378465469620, 	0.000000000000000, 	1.149169778666974, 	0.000000000000000, 	-1.695986327709386, 	0.000000000000000, 	-0.974803077355813, 	0.000000000000000, 	
+-4.898035507513607, 	0.000000000000000, 	1.622719302889447, 	0.000000000000000, 	0.583891313586579, 	0.000000000000000, 	-1.677182424094957, 	0.000000000000000, 	
+-1.915633132814685, 	0.000000000000000, 	-1.980150370851616, 	0.000000000000000, 	0.604538269404190, 	0.000000000000000, 	0.939862406149365, 	0.000000000000000, 	
+-1.266939874246416, 	0.000000000000000, 	-1.494771249200063, 	0.000000000000000, 	0.278042784093988, 	0.000000000000000, 	0.326627416008916, 	0.000000000000000, 	
+-1.914530157643303, 	0.000000000000000, 	1.908947721862196, 	0.000000000000000, 	0.531819285694044, 	0.000000000000000, 	3.056856632319658, 	0.000000000000000, 	
+-0.389241827774643, 	0.000000000000000, 	-2.418606606780420, 	0.000000000000000, 	0.915299238878703, 	0.000000000000000, 	-0.098774174295283, 	0.000000000000000, 	
+-0.906199428444304, 	0.000000000000000, 	0.316716451217743, 	0.000000000000000, 	-4.367700643578311, 	0.000000000000000, 	1.491687997515293, 	0.000000000000000, 	
+-1.962381126288365, 	0.000000000000000, 	-0.700829196527045, 	0.000000000000000, 	3.028958963615630, 	0.000000000000000, 	-2.313461067462598, 	0.000000000000000, 	
+-1.431933239886712, 	0.000000000000000, 	-0.831153039725342, 	0.000000000000000, 	3.939495598250743, 	0.000000000000000, 	0.342974753984771, 	0.000000000000000, 	
+-2.768330763002974, 	0.000000000000000, 	-2.744010370019008, 	0.000000000000000, 	3.821352685212561, 	0.000000000000000, 	4.551065271455856, 	0.000000000000000, 	
+3.270136437041298, 	0.000000000000000, 	-3.188028411950982, 	0.000000000000000, 	-0.777075012417436, 	0.000000000000000, 	0.097110650265216, 	0.000000000000000, 	
+1.221216137608812, 	0.000000000000000, 	-1.325824244541822, 	0.000000000000000, 	-2.655296734084113, 	0.000000000000000, 	-1.074792144885704, 	0.000000000000000, 	
+2.770401584439407, 	0.000000000000000, 	5.240270645610543, 	0.000000000000000, 	0.108576672208892, 	0.000000000000000, 	-1.209394350650142, 	0.000000000000000, 	
+1.403344353838785, 	0.000000000000000, 	-0.299032904177277, 	0.000000000000000, 	4.074959450638227, 	0.000000000000000, 	1.718727473952107, 	0.000000000000000, 	
+-3.061349227080806, 	0.000000000000000, 	-1.158596888541269, 	0.000000000000000, 	3.381858904662625, 	0.000000000000000, 	0.957339964054052, 	0.000000000000000, 	
+0.179900074904899, 	0.000000000000000, 	-3.909641902506081, 	0.000000000000000, 	0.805717289408649, 	0.000000000000000, 	2.047413793928261, 	0.000000000000000, 	
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+-2.097831202853255, 	0.000000000000000, 	2.711952282071310, 	0.000000000000000, 	1.498539238246888, 	0.000000000000000, 	1.317457282535915, 	0.000000000000000, 	
+-0.302765938349717, 	0.000000000000000, 	-0.044623707947201, 	0.000000000000000, 	2.337405215062395, 	0.000000000000000, 	-3.980689173859100, 	0.000000000000000, 	
+
+
+};
+
diff --git a/DSP_Lib/Examples/arm_fft_bin_example/ARM/arm_fft_bin_example_f32.c b/DSP_Lib/Examples/arm_fft_bin_example/ARM/arm_fft_bin_example_f32.c
new file mode 100644
index 0000000..6214211
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fft_bin_example/ARM/arm_fft_bin_example_f32.c
@@ -0,0 +1,158 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:	     arm_fft_bin_example_f32.c
+*
+* Description:   Example code demonstrating calculation of Max energy bin of
+*                frequency domain of input signal.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup FrequencyBin Frequency Bin Example
+ *
+ * \par Description
+ * \par
+ * Demonstrates the calculation of the maximum energy bin in the frequency
+ * domain of the input signal with the use of Complex FFT, Complex
+ * Magnitude, and Maximum functions.
+ *
+ * \par Algorithm:
+ * \par
+ * The input test signal contains a 10 kHz signal with uniformly distributed white noise.
+ * Calculating the FFT of the input signal will give us the maximum energy of the
+ * bin corresponding to the input frequency of 10 kHz.
+ *
+ * \par Block Diagram:
+ * \image html FFTBin.gif "Block Diagram"
+ * \par
+ * The figure below shows the time domain signal of 10 kHz signal with
+ * uniformly distributed white noise, and the next figure shows the input
+ * in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal.
+ * \par
+ * \image html FFTBinInput.gif "Input signal in Time domain"
+ * \image html FFTBinOutput.gif "Input signal in Frequency domain"
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testInput_f32_10khz points to the input data
+ * \li \c testOutput points to the output data
+ * \li \c fftSize length of FFT
+ * \li \c ifftFlag flag for the selection of CFFT/CIFFT
+ * \li \c doBitReverse Flag for selection of normal order or bit reversed order
+ * \li \c refIndex reference index value at which maximum energy of bin ocuurs
+ * \li \c testIndex calculated index value at which maximum energy of bin ocuurs
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_cfft_f32()
+ * - arm_cmplx_mag_f32()
+ * - arm_max_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_fft_bin_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_fft_bin_example_f32.c
+  */
+
+
+#include "arm_math.h"
+#include "arm_const_structs.h"
+
+#define TEST_LENGTH_SAMPLES 2048
+
+/* -------------------------------------------------------------------
+* External Input and Output buffer Declarations for FFT Bin Example
+* ------------------------------------------------------------------- */
+extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
+static float32_t testOutput[TEST_LENGTH_SAMPLES/2];
+
+/* ------------------------------------------------------------------
+* Global variables for FFT Bin Example
+* ------------------------------------------------------------------- */
+uint32_t fftSize = 1024;
+uint32_t ifftFlag = 0;
+uint32_t doBitReverse = 1;
+
+/* Reference index at which max energy of bin ocuurs */
+uint32_t refIndex = 213, testIndex = 0;
+
+/* ----------------------------------------------------------------------
+* Max magnitude FFT Bin test
+* ------------------------------------------------------------------- */
+
+int32_t main(void)
+{
+
+  arm_status status;
+  float32_t maxValue;
+
+  status = ARM_MATH_SUCCESS;
+
+  /* Process the data through the CFFT/CIFFT module */
+  arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32_10khz, ifftFlag, doBitReverse);
+
+  /* Process the data through the Complex Magnitude Module for
+  calculating the magnitude at each bin */
+  arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize);
+
+  /* Calculates maxValue and returns corresponding BIN value */
+  arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
+
+  if(testIndex !=  refIndex)
+  {
+    status = ARM_MATH_TEST_FAILURE;
+  }
+
+  /* ----------------------------------------------------------------------
+  ** Loop here if the signals fail the PASS check.
+  ** This denotes a test failure
+  ** ------------------------------------------------------------------- */
+
+  if( status != ARM_MATH_SUCCESS)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+ /** \endlink */
diff --git a/DSP_Lib/Examples/arm_fft_bin_example/GCC/Abstract.txt b/DSP_Lib/Examples/arm_fft_bin_example/GCC/Abstract.txt
new file mode 100644
index 0000000..f6a7fba
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fft_bin_example/GCC/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_fft_bin_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_fft_bin_example/GCC/arm_fft_bin_data.c b/DSP_Lib/Examples/arm_fft_bin_example/GCC/arm_fft_bin_data.c
new file mode 100644
index 0000000..b5159e5
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fft_bin_example/GCC/arm_fft_bin_data.c
@@ -0,0 +1,308 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*   
+* Project: 	    CMSIS DSP Library   
+* Title:	     	arm_fft_bin_data.c
+*   
+* Description:	 Data file used for example code
+*   
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+Test Input signal contains 10KHz signal + Uniformly distributed white noise
+** ------------------------------------------------------------------- */
+
+float32_t testInput_f32_10khz[2048] = 
+{   
+-0.865129623056441, 	0.000000000000000, 	-2.655020678073846, 	0.000000000000000, 	0.600664612949661, 	0.000000000000000, 	0.080378093886515, 	0.000000000000000, 	
+-2.899160484012034, 	0.000000000000000, 	2.563004262857762, 	0.000000000000000, 	3.078328403304206, 	0.000000000000000, 	0.105906778385130, 	0.000000000000000, 	
+0.048366940168201, 	0.000000000000000, 	-0.145696461188734, 	0.000000000000000, 	-0.023417155362879, 	0.000000000000000, 	2.127729174988954, 	0.000000000000000, 	
+-1.176633086028377, 	0.000000000000000, 	3.690223557991855, 	0.000000000000000, 	-0.622791766173194, 	0.000000000000000, 	0.722837373872203, 	0.000000000000000, 	
+2.739754205367484, 	0.000000000000000, 	-0.062610410524552, 	0.000000000000000, 	-0.891296810967338, 	0.000000000000000, 	-1.845872258871811, 	0.000000000000000, 	
+1.195039415434387, 	0.000000000000000, 	-2.177388969045026, 	0.000000000000000, 	1.078649103637905, 	0.000000000000000, 	2.570976050490193, 	0.000000000000000, 	
+-1.383551403404574, 	0.000000000000000, 	2.392141424058873, 	0.000000000000000, 	2.858002843205065, 	0.000000000000000, 	-3.682433899725536, 	0.000000000000000, 	
+-3.488146646451150, 	0.000000000000000, 	1.323468578888120, 	0.000000000000000, 	-0.099771155430726, 	0.000000000000000, 	1.561168082500454, 	0.000000000000000, 	
+1.025026795103179, 	0.000000000000000, 	0.928841900171200, 	0.000000000000000, 	2.930499509864950, 	0.000000000000000, 	2.013349089766430, 	0.000000000000000, 	
+2.381676148486737, 	0.000000000000000, 	-3.081062307950236, 	0.000000000000000, 	-0.389579115537544, 	0.000000000000000, 	0.181540149166620, 	0.000000000000000, 	
+-2.601953341353208, 	0.000000000000000, 	0.333435137783218, 	0.000000000000000, 	-2.812945856162965, 	0.000000000000000, 	2.649109640172910, 	0.000000000000000, 	
+-1.003963025744654, 	0.000000000000000, 	1.552460768755035, 	0.000000000000000, 	0.088641345335247, 	0.000000000000000, 	-2.519951327113426, 	0.000000000000000, 	
+-4.341348988610527, 	0.000000000000000, 	0.557772429359965, 	0.000000000000000, 	-1.671267412948494, 	0.000000000000000, 	0.733951350960387, 	0.000000000000000, 	
+0.409263788034864, 	0.000000000000000, 	3.566033071952806, 	0.000000000000000, 	1.882565173848352, 	0.000000000000000, 	-1.106017073793287, 	0.000000000000000, 	
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+-0.364431989095434, 	0.000000000000000, 	-0.263182496622273, 	0.000000000000000, 	1.843464680631139, 	0.000000000000000, 	-0.419107530229249, 	0.000000000000000, 	
+1.662335873298487, 	0.000000000000000, 	-0.853687563304005, 	0.000000000000000, 	-2.584133404357169, 	0.000000000000000, 	3.466839568922895, 	0.000000000000000, 	
+0.881671345091973, 	0.000000000000000, 	0.454620014206908, 	0.000000000000000, 	-1.737245187402739, 	0.000000000000000, 	2.162713238369243, 	0.000000000000000, 	
+-3.868539002714486, 	0.000000000000000, 	2.014114855933826, 	0.000000000000000, 	-0.703233831811006, 	0.000000000000000, 	-3.410319935997574, 	0.000000000000000, 	
+-1.851235811006584, 	0.000000000000000, 	0.909783907894036, 	0.000000000000000, 	0.091884002136728, 	0.000000000000000, 	-2.688294201131650, 	0.000000000000000, 	
+-0.906134178460955, 	0.000000000000000, 	3.475054609035133, 	0.000000000000000, 	-0.573927964170323, 	0.000000000000000, 	-0.429542937515399, 	0.000000000000000, 	
+0.991348618739939, 	0.000000000000000, 	1.974804904926325, 	0.000000000000000, 	0.975783450796698, 	0.000000000000000, 	-3.057119549071503, 	0.000000000000000, 	
+-3.899429237481194, 	0.000000000000000, 	0.362439009175350, 	0.000000000000000, 	-1.124461670265618, 	0.000000000000000, 	1.806000360163583, 	0.000000000000000, 	
+-2.768333362600288, 	0.000000000000000, 	0.244387897900379, 	0.000000000000000, 	0.908767296720926, 	0.000000000000000, 	1.254669374391882, 	0.000000000000000, 	
+-1.420441929463686, 	0.000000000000000, 	-0.875658895966293, 	0.000000000000000, 	0.183824603376167, 	0.000000000000000, 	-3.361653917011686, 	0.000000000000000, 	
+-0.796615630227952, 	0.000000000000000, 	-1.660226542658673, 	0.000000000000000, 	1.654439358307226, 	0.000000000000000, 	2.782812946709771, 	0.000000000000000, 	
+1.418064412811531, 	0.000000000000000, 	-0.819645647243761, 	0.000000000000000, 	0.807724772592699, 	0.000000000000000, 	-0.941967976379298, 	0.000000000000000, 	
+-2.312768306047469, 	0.000000000000000, 	0.872426936477443, 	0.000000000000000, 	0.919528961530845, 	0.000000000000000, 	-2.084904575264847, 	0.000000000000000, 	
+-1.972464868459322, 	0.000000000000000, 	-1.050687203338466, 	0.000000000000000, 	1.659579707007902, 	0.000000000000000, 	-1.820640014705855, 	0.000000000000000, 	
+-1.195078061671045, 	0.000000000000000, 	-1.639773173762048, 	0.000000000000000, 	1.616744338157063, 	0.000000000000000, 	4.019216096811563, 	0.000000000000000, 	
+3.461021102549681, 	0.000000000000000, 	1.642352734361484, 	0.000000000000000, 	-0.046354693720813, 	0.000000000000000, 	-0.041936252359677, 	0.000000000000000, 	
+-2.393307519480551, 	0.000000000000000, 	-0.341471634615121, 	0.000000000000000, 	-0.392073595257017, 	0.000000000000000, 	-0.219299018372730, 	0.000000000000000, 	
+-2.016391579662071, 	0.000000000000000, 	-0.653096251969787, 	0.000000000000000, 	1.466353155666821, 	0.000000000000000, 	-2.872058864320412, 	0.000000000000000, 	
+-2.157180779503830, 	0.000000000000000, 	0.723257479841560, 	0.000000000000000, 	3.769951308104384, 	0.000000000000000, 	-1.923392042420024, 	0.000000000000000, 	
+0.644899359942840, 	0.000000000000000, 	-2.090226891621437, 	0.000000000000000, 	-0.277043982890403, 	0.000000000000000, 	-0.528271428321112, 	0.000000000000000, 	
+2.518120645960652, 	0.000000000000000, 	1.040820431111488, 	0.000000000000000, 	-4.560583754742486, 	0.000000000000000, 	-0.226899614918836, 	0.000000000000000, 	
+1.713331231108959, 	0.000000000000000, 	-3.293941019163642, 	0.000000000000000, 	-1.113331444648290, 	0.000000000000000, 	-1.032308423149906, 	0.000000000000000, 	
+1.593774272982443, 	0.000000000000000, 	-1.246840475090529, 	0.000000000000000, 	-0.190344684920137, 	0.000000000000000, 	-1.719386356896355, 	0.000000000000000, 	
+-2.827721754659679, 	0.000000000000000, 	-0.092438285279020, 	0.000000000000000, 	-0.565844430675246, 	0.000000000000000, 	-1.077916121691716, 	0.000000000000000, 	
+-1.208665809504693, 	0.000000000000000, 	-2.996014266381254, 	0.000000000000000, 	2.888573323402423, 	0.000000000000000, 	2.829507048720695, 	0.000000000000000, 	
+-0.859177034120755, 	0.000000000000000, 	-1.969302377743254, 	0.000000000000000, 	0.777437674525362, 	0.000000000000000, 	-0.124910190157646, 	0.000000000000000, 	
+0.129875493115290, 	0.000000000000000, 	-4.192139262163992, 	0.000000000000000, 	3.023496047962126, 	0.000000000000000, 	1.149775163736637, 	0.000000000000000, 	
+2.038151304801731, 	0.000000000000000, 	3.016122489841263, 	0.000000000000000, 	-4.829481812137012, 	0.000000000000000, 	-1.668436615909279, 	0.000000000000000, 	
+0.958586784636918, 	0.000000000000000, 	1.550652410058678, 	0.000000000000000, 	-1.456305257976716, 	0.000000000000000, 	-0.079588392344731, 	0.000000000000000, 	
+-2.453213599392345, 	0.000000000000000, 	0.296795909127105, 	0.000000000000000, 	-0.253426616607643, 	0.000000000000000, 	1.418937160028195, 	0.000000000000000, 	
+-1.672949529066915, 	0.000000000000000, 	-1.620990298572947, 	0.000000000000000, 	-1.085103073196045, 	0.000000000000000, 	0.738606361195386, 	0.000000000000000, 	
+-2.097831202853255, 	0.000000000000000, 	2.711952282071310, 	0.000000000000000, 	1.498539238246888, 	0.000000000000000, 	1.317457282535915, 	0.000000000000000, 	
+-0.302765938349717, 	0.000000000000000, 	-0.044623707947201, 	0.000000000000000, 	2.337405215062395, 	0.000000000000000, 	-3.980689173859100, 	0.000000000000000, 	
+
+
+};
+
diff --git a/DSP_Lib/Examples/arm_fft_bin_example/GCC/arm_fft_bin_example_f32.c b/DSP_Lib/Examples/arm_fft_bin_example/GCC/arm_fft_bin_example_f32.c
new file mode 100644
index 0000000..6214211
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fft_bin_example/GCC/arm_fft_bin_example_f32.c
@@ -0,0 +1,158 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:	     arm_fft_bin_example_f32.c
+*
+* Description:   Example code demonstrating calculation of Max energy bin of
+*                frequency domain of input signal.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup FrequencyBin Frequency Bin Example
+ *
+ * \par Description
+ * \par
+ * Demonstrates the calculation of the maximum energy bin in the frequency
+ * domain of the input signal with the use of Complex FFT, Complex
+ * Magnitude, and Maximum functions.
+ *
+ * \par Algorithm:
+ * \par
+ * The input test signal contains a 10 kHz signal with uniformly distributed white noise.
+ * Calculating the FFT of the input signal will give us the maximum energy of the
+ * bin corresponding to the input frequency of 10 kHz.
+ *
+ * \par Block Diagram:
+ * \image html FFTBin.gif "Block Diagram"
+ * \par
+ * The figure below shows the time domain signal of 10 kHz signal with
+ * uniformly distributed white noise, and the next figure shows the input
+ * in the frequency domain. The bin with maximum energy corresponds to 10 kHz signal.
+ * \par
+ * \image html FFTBinInput.gif "Input signal in Time domain"
+ * \image html FFTBinOutput.gif "Input signal in Frequency domain"
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testInput_f32_10khz points to the input data
+ * \li \c testOutput points to the output data
+ * \li \c fftSize length of FFT
+ * \li \c ifftFlag flag for the selection of CFFT/CIFFT
+ * \li \c doBitReverse Flag for selection of normal order or bit reversed order
+ * \li \c refIndex reference index value at which maximum energy of bin ocuurs
+ * \li \c testIndex calculated index value at which maximum energy of bin ocuurs
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_cfft_f32()
+ * - arm_cmplx_mag_f32()
+ * - arm_max_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_fft_bin_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_fft_bin_example_f32.c
+  */
+
+
+#include "arm_math.h"
+#include "arm_const_structs.h"
+
+#define TEST_LENGTH_SAMPLES 2048
+
+/* -------------------------------------------------------------------
+* External Input and Output buffer Declarations for FFT Bin Example
+* ------------------------------------------------------------------- */
+extern float32_t testInput_f32_10khz[TEST_LENGTH_SAMPLES];
+static float32_t testOutput[TEST_LENGTH_SAMPLES/2];
+
+/* ------------------------------------------------------------------
+* Global variables for FFT Bin Example
+* ------------------------------------------------------------------- */
+uint32_t fftSize = 1024;
+uint32_t ifftFlag = 0;
+uint32_t doBitReverse = 1;
+
+/* Reference index at which max energy of bin ocuurs */
+uint32_t refIndex = 213, testIndex = 0;
+
+/* ----------------------------------------------------------------------
+* Max magnitude FFT Bin test
+* ------------------------------------------------------------------- */
+
+int32_t main(void)
+{
+
+  arm_status status;
+  float32_t maxValue;
+
+  status = ARM_MATH_SUCCESS;
+
+  /* Process the data through the CFFT/CIFFT module */
+  arm_cfft_f32(&arm_cfft_sR_f32_len1024, testInput_f32_10khz, ifftFlag, doBitReverse);
+
+  /* Process the data through the Complex Magnitude Module for
+  calculating the magnitude at each bin */
+  arm_cmplx_mag_f32(testInput_f32_10khz, testOutput, fftSize);
+
+  /* Calculates maxValue and returns corresponding BIN value */
+  arm_max_f32(testOutput, fftSize, &maxValue, &testIndex);
+
+  if(testIndex !=  refIndex)
+  {
+    status = ARM_MATH_TEST_FAILURE;
+  }
+
+  /* ----------------------------------------------------------------------
+  ** Loop here if the signals fail the PASS check.
+  ** This denotes a test failure
+  ** ------------------------------------------------------------------- */
+
+  if( status != ARM_MATH_SUCCESS)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+ /** \endlink */
diff --git a/DSP_Lib/Examples/arm_fir_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_fir_example/ARM/Abstract.txt
new file mode 100644
index 0000000..1fb1bfb
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fir_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_fir_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_fir_example/ARM/arm_fir_data.c b/DSP_Lib/Examples/arm_fir_example/ARM/arm_fir_data.c
new file mode 100644
index 0000000..283a25e
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fir_example/ARM/arm_fir_data.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*   
+* Project: 	    CMSIS DSP Library   
+* Title:	     	arm_fir_data.c
+*   
+* Description:	 Data file used for example code
+*   
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+** Test input signal contains 1000Hz + 15000 Hz
+** ------------------------------------------------------------------- */
+
+float32_t testInput_f32_1kHz_15kHz[320] =
+{
++0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
+-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, 
+-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, 
++0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
++0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, 
+-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, 
++0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
++0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, 
+-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, 
+-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
+-0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, 
+-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, 
++0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
++0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, 
+-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, 
+-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
++0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+-0.8660254038f, -0.4619397663f, -1.3194792169f, -1.1827865776f, -0.5000000000f, -1.1827865776f, -1.3194792169f, -0.4619397663f, 
+-0.8660254038f, -1.2552931065f, -0.3535533906f, -0.4174197128f, -1.0000000000f, -0.1913417162f, +0.0947343455f, -0.5924659585f, 
+-0.0000000000f, +0.5924659585f, -0.0947343455f, +0.1913417162f, +1.0000000000f, +0.4174197128f, +0.3535533906f, +1.2552931065f, 
++0.8660254038f, +0.4619397663f, +1.3194792169f, +1.1827865776f, +0.5000000000f, +1.1827865776f, +1.3194792169f, +0.4619397663f, 
++0.8660254038f, +1.2552931065f, +0.3535533906f, +0.4174197128f, +1.0000000000f, +0.1913417162f, -0.0947343455f, +0.5924659585f, 
++0.0000000000f, -0.5924659585f, +0.0947343455f, -0.1913417162f, -1.0000000000f, -0.4174197128f, -0.3535533906f, -1.2552931065f, 
+};
+
+float32_t refOutput[320] = 
+{
++0.0000000000f, -0.0010797829f, -0.0007681386f, -0.0001982932f, +0.0000644313f, +0.0020854271f, +0.0036891871f, +0.0015855941f, 
+-0.0026280805f, -0.0075907658f, -0.0119390538f, -0.0086665968f, +0.0088981202f, +0.0430539279f, +0.0974468742f, +0.1740405600f, 
++0.2681416601f, +0.3747720089f, +0.4893362230f, +0.6024154672f, +0.7058740791f, +0.7968348987f, +0.8715901940f, +0.9277881093f, 
++0.9682182661f, +0.9934674267f, +1.0012052245f, +0.9925859371f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, 
++0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, 
+-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, 
+-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, 
+-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, 
++0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, 
++0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, 
++0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, 
+-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, 
+-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, 
+-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, 
++0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, 
++0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, 
++0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, -0.0000000000f, -0.1309866321f, 
+-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, 
+-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, 
+-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, 
++0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, 
++0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, 
++0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, 
+-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, 
+-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, 
+-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, 
++0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, 
++0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, 
++0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, 
+-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, 
+-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, 
+-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, -0.0000000000f, +0.1309866321f, 
++0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, 
++0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f, 
++0.7085021596f, +0.6100062330f, +0.5012752767f, +0.3834386057f, +0.2592435399f, +0.1309866321f, +0.0000000000f, -0.1309866321f, 
+-0.2592435399f, -0.3834386057f, -0.5012752767f, -0.6100062330f, -0.7085021596f, -0.7952493046f, -0.8679010068f, -0.9257026822f, 
+-0.9681538347f, -0.9936657199f, -1.0019733630f, -0.9936657199f, -0.9681538347f, -0.9257026822f, -0.8679010068f, -0.7952493046f, 
+-0.7085021596f, -0.6100062330f, -0.5012752767f, -0.3834386057f, -0.2592435399f, -0.1309866321f, +0.0000000000f, +0.1309866321f, 
++0.2592435399f, +0.3834386057f, +0.5012752767f, +0.6100062330f, +0.7085021596f, +0.7952493046f, +0.8679010068f, +0.9257026822f, 
++0.9681538347f, +0.9936657199f, +1.0019733630f, +0.9936657199f, +0.9681538347f, +0.9257026822f, +0.8679010068f, +0.7952493046f 
+};
+
diff --git a/DSP_Lib/Examples/arm_fir_example/ARM/arm_fir_example_f32.c b/DSP_Lib/Examples/arm_fir_example/ARM/arm_fir_example_f32.c
new file mode 100644
index 0000000..58dfb47
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fir_example/ARM/arm_fir_example_f32.c
@@ -0,0 +1,233 @@
+/* ----------------------------------------------------------------------
+ * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+ *
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+ * Title:        arm_fir_example_f32.c
+ *
+ * Description:  Example code demonstrating how an FIR filter can be used
+ *               as a low pass filter.
+ *
+ * Target Processor: Cortex-M4/Cortex-M3
+ *
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup FIRLPF FIR Lowpass Filter Example
+ *
+ * \par Description:
+ * \par
+ * Removes high frequency signal components from the input using an FIR lowpass filter.
+ * The example demonstrates how to configure an FIR filter and then pass data through
+ * it in a block-by-block fashion.
+ * \image html FIRLPF_signalflow.gif
+ *
+ * \par Algorithm:
+ * \par
+ * The input signal is a sum of two sine waves:  1 kHz and 15 kHz.
+ * This is processed by an FIR lowpass filter with cutoff frequency 6 kHz.
+ * The lowpass filter eliminates the 15 kHz signal leaving only the 1 kHz sine wave at the output.
+ * \par
+ * The lowpass filter was designed using MATLAB with a sample rate of 48 kHz and
+ * a length of 29 points.
+ * The MATLAB code to generate the filter coefficients is shown below:
+ * <pre>
+ *     h = fir1(28, 6/24);
+ * </pre>
+ * The first argument is the "order" of the filter and is always one less than the desired length.
+ * The second argument is the normalized cutoff frequency.  This is in the range 0 (DC) to 1.0 (Nyquist).
+ * A 6 kHz cutoff with a Nyquist frequency of 24 kHz lies at a normalized frequency of 6/24 = 0.25.
+ * The CMSIS FIR filter function requires the coefficients to be in time reversed order.
+ * <pre>
+ *     fliplr(h)
+ * </pre>
+ * The resulting filter coefficients and are shown below.
+ * Note that the filter is symmetric (a property of linear phase FIR filters)
+ * and the point of symmetry is sample 14.  Thus the filter will have a delay of
+ * 14 samples for all frequencies.
+ * \par
+ * \image html FIRLPF_coeffs.gif
+ * \par
+ * The frequency response of the filter is shown next.
+ * The passband gain of the filter is 1.0 and it reaches 0.5 at the cutoff frequency 6 kHz.
+ * \par
+ * \image html FIRLPF_response.gif
+ * \par
+ * The input signal is shown below.
+ * The left hand side shows the signal in the time domain while the right hand side is a frequency domain representation.
+ * The two sine wave components can be clearly seen.
+ * \par
+ * \image html FIRLPF_input.gif
+ * \par
+ * The output of the filter is shown below.  The 15 kHz component has been eliminated.
+ * \par
+ * \image html FIRLPF_output.gif
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testInput_f32_1kHz_15kHz points to the input data
+ * \li \c refOutput points to the reference output data
+ * \li \c testOutput points to the test output data
+ * \li \c firStateF32 points to state buffer
+ * \li \c firCoeffs32 points to coefficient buffer
+ * \li \c blockSize number of samples processed at a time
+ * \li \c numBlocks number of frames
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_fir_init_f32()
+ * - arm_fir_f32()
+ *
+ * <b> Refer  </b>
+ * \link arm_fir_example_f32.c \endlink
+ *
+ */
+
+
+/** \example arm_fir_example_f32.c
+ */
+
+/* ----------------------------------------------------------------------
+** Include Files
+** ------------------------------------------------------------------- */
+
+#include "arm_math.h"
+#include "math_helper.h"
+
+/* ----------------------------------------------------------------------
+** Macro Defines
+** ------------------------------------------------------------------- */
+
+#define TEST_LENGTH_SAMPLES  320
+#define SNR_THRESHOLD_F32    140.0f
+#define BLOCK_SIZE            32
+#define NUM_TAPS              29
+
+/* -------------------------------------------------------------------
+ * The input signal and reference output (computed with MATLAB)
+ * are defined externally in arm_fir_lpf_data.c.
+ * ------------------------------------------------------------------- */
+
+extern float32_t testInput_f32_1kHz_15kHz[TEST_LENGTH_SAMPLES];
+extern float32_t refOutput[TEST_LENGTH_SAMPLES];
+
+/* -------------------------------------------------------------------
+ * Declare Test output buffer
+ * ------------------------------------------------------------------- */
+
+static float32_t testOutput[TEST_LENGTH_SAMPLES];
+
+/* -------------------------------------------------------------------
+ * Declare State buffer of size (numTaps + blockSize - 1)
+ * ------------------------------------------------------------------- */
+
+static float32_t firStateF32[BLOCK_SIZE + NUM_TAPS - 1];
+
+/* ----------------------------------------------------------------------
+** FIR Coefficients buffer generated using fir1() MATLAB function.
+** fir1(28, 6/24)
+** ------------------------------------------------------------------- */
+
+const float32_t firCoeffs32[NUM_TAPS] = {
+  -0.0018225230f, -0.0015879294f, +0.0000000000f, +0.0036977508f, +0.0080754303f, +0.0085302217f, -0.0000000000f, -0.0173976984f,
+  -0.0341458607f, -0.0333591565f, +0.0000000000f, +0.0676308395f, +0.1522061835f, +0.2229246956f, +0.2504960933f, +0.2229246956f,
+  +0.1522061835f, +0.0676308395f, +0.0000000000f, -0.0333591565f, -0.0341458607f, -0.0173976984f, -0.0000000000f, +0.0085302217f,
+  +0.0080754303f, +0.0036977508f, +0.0000000000f, -0.0015879294f, -0.0018225230f
+};
+
+/* ------------------------------------------------------------------
+ * Global variables for FIR LPF Example
+ * ------------------------------------------------------------------- */
+
+uint32_t blockSize = BLOCK_SIZE;
+uint32_t numBlocks = TEST_LENGTH_SAMPLES/BLOCK_SIZE;
+
+float32_t  snr;
+
+/* ----------------------------------------------------------------------
+ * FIR LPF Example
+ * ------------------------------------------------------------------- */
+
+int32_t main(void)
+{
+  uint32_t i;
+  arm_fir_instance_f32 S;
+  arm_status status;
+  float32_t  *inputF32, *outputF32;
+
+  /* Initialize input and output buffer pointers */
+  inputF32 = &testInput_f32_1kHz_15kHz[0];
+  outputF32 = &testOutput[0];
+
+  /* Call FIR init function to initialize the instance structure. */
+  arm_fir_init_f32(&S, NUM_TAPS, (float32_t *)&firCoeffs32[0], &firStateF32[0], blockSize);
+
+  /* ----------------------------------------------------------------------
+  ** Call the FIR process function for every blockSize samples
+  ** ------------------------------------------------------------------- */
+
+  for(i=0; i < numBlocks; i++)
+  {
+    arm_fir_f32(&S, inputF32 + (i * blockSize), outputF32 + (i * blockSize), blockSize);
+  }
+
+  /* ----------------------------------------------------------------------
+  ** Compare the generated output against the reference output computed
+  ** in MATLAB.
+  ** ------------------------------------------------------------------- */
+
+  snr = arm_snr_f32(&refOutput[0], &testOutput[0], TEST_LENGTH_SAMPLES);
+
+  if (snr < SNR_THRESHOLD_F32)
+  {
+    status = ARM_MATH_TEST_FAILURE;
+  }
+  else
+  {
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* ----------------------------------------------------------------------
+  ** Loop here if the signal does not match the reference output.
+  ** ------------------------------------------------------------------- */
+
+  if( status != ARM_MATH_SUCCESS)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+/** \endlink */
diff --git a/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.c b/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.c
new file mode 100644
index 0000000..dbf2cfe
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.c
@@ -0,0 +1,458 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0    
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.c
+*
+* Description:	Definition of all helper functions required.  
+*  
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+/* ----------------------------------------------------------------------
+*		Include standard header files  
+* -------------------------------------------------------------------- */
+#include<math.h>
+
+/* ----------------------------------------------------------------------
+*		Include project header files  
+* -------------------------------------------------------------------- */
+#include "math_helper.h"
+
+/** 
+ * @brief  Caluclation of SNR
+ * @param  float* 	Pointer to the reference buffer
+ * @param  float*	Pointer to the test buffer
+ * @param  uint32_t	total number of samples
+ * @return float	SNR
+ * The function Caluclates signal to noise ratio for the reference output 
+ * and test output 
+ */
+
+float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
+{
+  float EnergySignal = 0.0, EnergyError = 0.0;
+  uint32_t i;
+  float SNR;
+  int temp;
+  int *test;
+
+  for (i = 0; i < buffSize; i++)
+    {
+ 	  /* Checking for a NAN value in pRef array */
+	  test =   (int *)(&pRef[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+
+	  /* Checking for a NAN value in pTest array */
+	  test =   (int *)(&pTest[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+      EnergySignal += pRef[i] * pRef[i];
+      EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); 
+    }
+
+	/* Checking for a NAN value in EnergyError */
+	test =   (int *)(&EnergyError);
+    temp =  *test;
+
+    if(temp == 0x7FC00000)
+    {
+  		return(0);
+    }
+	
+
+  SNR = 10 * log10 (EnergySignal / EnergyError);
+
+  return (SNR);
+
+}
+
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q15_t* 	    Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
+                            uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed in q12.20 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point(q12.20) values 
+ */
+
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1048576.0f corresponds to pow(2, 20) */
+      pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 1.0)
+        {
+          pOut[i] = 0x000FFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q15_t* 	Pointer to Ref buffer
+ * @param  q15_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}	
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q31_t* 	Pointer to Ref buffer
+ * @param  q31_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q31 (q31_t * input_buf, 
+								 uint32_t blockSize,
+                                 uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q7 (q7_t * input_buf, 
+								uint32_t blockSize,
+                                uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+
+
+/** 
+ * @brief  Caluclates number of guard bits 
+ * @param  uint32_t 	number of additions
+ * @return none
+ * The function Caluclates the number of guard bits  
+ * depending on the numtaps 
+ */
+
+uint32_t arm_calc_guard_bits (uint32_t num_adds)
+{
+  uint32_t i = 1, j = 0;
+
+  if (num_adds == 1)
+    {
+      return (0);
+    }
+
+  while (i < num_adds)
+    {
+      i = i * 2;
+      j++;
+    }
+
+  return (j);
+}
+
+/** 
+ * @brief  Converts Q15 to floating-point
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ */
+
+void arm_apply_guard_bits (float32_t * pIn, 
+						   uint32_t numSamples, 
+						   uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
+    }
+}
+
+/** 
+ * @brief  Calculates pow(2, numShifts)
+ * @param  uint32_t 	number of shifts
+ * @return pow(2, numShifts)
+ */
+uint32_t arm_calc_2pow(uint32_t numShifts)
+{
+
+  uint32_t i, val = 1;
+
+  for (i = 0; i < numShifts; i++)
+    {
+      val = val * 2;
+    }	
+
+  return(val);
+}
+
+
+
+/** 
+ * @brief  Converts float to fixed q14 
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q14 (float *pIn, q15_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 16384.0f corresponds to pow(2, 14) */
+      pOut[i] = (q15_t) (pIn[i] * 16384.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFF;
+        }
+
+    }
+
+}
+
+ 
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q30 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q29 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 4.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+
+/** 
+ * @brief  Converts float to fixed q28 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q28 (float *pIn, q31_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	/* 268435456.0f corresponds to pow(2, 28) */
+      pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 8.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Clip the float values to +/- 1 
+ * @param  pIn 	input buffer
+ * @param  numSamples 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_clip_f32 (float *pIn, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      if(pIn[i] > 1.0f)
+	  {
+	    pIn[i] = 1.0;
+	  }
+	  else if( pIn[i] < -1.0f)
+	  {
+	    pIn[i] = -1.0;
+	  }
+	       
+    }
+}
+
+
+
+
diff --git a/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.h b/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.h
new file mode 100644
index 0000000..46b0af3
--- /dev/null
+++ b/DSP_Lib/Examples/arm_fir_example/ARM/math_helper.h
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.h
+* 
+* Description:	Prototypes of all helper functions required.  
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+
+#include "arm_math.h"
+
+#ifndef MATH_HELPER_H
+#define MATH_HELPER_H
+
+float arm_snr_f32(float *pRef, float *pTest,  uint32_t buffSize);  
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
+void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
+void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_clip_f32(float *pIn, uint32_t numSamples);
+uint32_t arm_calc_guard_bits(uint32_t num_adds);
+void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
+uint32_t arm_calc_2pow(uint32_t guard_bits);
+#endif
+
diff --git a/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/Abstract.txt
new file mode 100644
index 0000000..a4ece08
--- /dev/null
+++ b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_graphic_equalizer_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/arm_graphic_equalizer_data.c b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/arm_graphic_equalizer_data.c
new file mode 100644
index 0000000..ffb0ff3
--- /dev/null
+++ b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/arm_graphic_equalizer_data.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*   
+* Project: 	    CMSIS DSP Library   
+* Title:	     	arm_graphic_equalizer_data.c
+*   
+* Description:	 Data file used for example code
+*   
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+ * -------------------------------------------------------------------- */
+
+#include "arm_math.h"
+
+float32_t testRefOutput_f32[320] = {
+
+0.000000000000000000,	0.001898396760225296,	0.004215449094772339,	0.007432077080011368,	0.010948467999696732,	0.015026375651359558,	0.019191544502973557,	0.023574527353048325,	
+0.027919445186853409,	0.032277785241603851,	0.036551639437675476,	0.040732793509960175,	0.044799156486988068,	0.048710610717535019,	0.052476800978183746,	0.056059073656797409,	
+0.059482168406248093,	0.062726479023694992,	0.065821025520563126,	0.068763464689254761,	0.071577839553356171,	0.074270240962505341,	0.076856281608343124,	0.079344697296619415,	
+0.081745062023401260,	0.084067162126302719,	0.086318407207727432,	0.088509257882833481,	0.090647127479314804,	0.092742368578910828,	0.094802625477313995,	0.096837285906076431,	
+0.098853722214698792,	0.100859899073839190,	0.102862443774938580,	0.104867763817310330,	0.106881409883499150,	0.108908228576183320,	0.110952425748109820,	0.113017357885837550,	
+0.115105822682380680,	0.117219865322113040,	0.119361080229282380,	0.121530555188655850,	0.123729091137647630,	0.125957202166318890,	0.128215309232473370,	0.130503740161657330,	
+0.132822841405868530,	0.135173004120588300,	0.137554679065942760,	0.139968376606702800,	0.142414685338735580,	0.144894234836101530,	0.147407654672861100,	0.149955596774816510,	
+0.152538605034351350,	0.155157200992107390,	0.157811731100082400,	0.160502441227436070,	0.163229387253522870,	0.165992442518472670,	0.168791320174932480,	0.171625509858131410,	
+0.174494370818138120,	0.177397061139345170,	0.180332608520984650,	0.183299910277128220,	0.186297744512557980,	0.189324837177991870,	0.192379791289567950,	0.195461250841617580,	
+0.198567759245634080,	0.201697919517755510,	0.204850304871797560,	0.208023533225059510,	0.211216274648904800,	0.214427210390567780,	0.217655111104249950,	0.220898788422346120,	
+0.224157124757766720,	0.227429077029228210,	0.230713658034801480,	0.234009962528944020,	0.237317133694887160,	0.240634419023990630,	0.243961080908775330,	0.247296508401632310,	
+0.250640105456113820,	0.253991369158029560,	0.257349837571382520,	0.260715119540691380,	0.264086868613958360,	0.267464816570281980,	0.270848698914051060,	0.274238351732492450,	
+0.277633611112833020,	0.281034380197525020,	0.284440591931343080,	0.287852220237255100,	0.291269283741712570,	0.294691801071166990,	0.298119872808456420,	0.301553562283515930,	
+0.304993014782667160,	0.308438356965780260,	0.311889752745628360,	0.315347377210855480,	0.318811416625976560,	0.322282072156667710,	0.325759567320346830,	0.329244095832109450,	
+0.332735907286405560,	0.336235217750072480,	0.339742250740528110,	0.343257248401641850,	0.346780419349670410,	0.350311983376741410,	0.353852160274982450,	0.357401121407747270,	
+0.360959105193614960,	0.364526227116584780,	0.368102725595235820,	0.371688675135374070,	0.375284302979707720,	0.378889638930559160,	0.382504884153604510,	0.386130042374134060,	
+0.389765247702598570,	0.393410529941320420,	0.397065933793783190,	0.400731507688760760,	0.404407206922769550,	0.408093083649873730,	0.411789052188396450,	0.415495119988918300,	
+0.419211201369762420,	0.422937240451574330,	0.426673140376806260,	0.430418811738491060,	0.434174135327339170,	0.437938995659351350,	0.441713258624076840,	0.445496778935194020,	
+0.449289388954639430,	0.453090950846672060,	0.456901267170906070,	0.460720170289278030,	0.464547459036111830,	0.468382950872182850,	0.472226426005363460,	0.476077698171138760,	
+0.479936532676219940,	0.483802750706672670,	0.487676106393337250,	0.491556398570537570,	0.495443399995565410,	0.499336875975131990,	0.503236617892980580,	0.507142387330532070,	
+0.511053957045078280,	0.514971107244491580,	0.518893606960773470,	0.522821225225925450,	0.526753749698400500,	0.530690938234329220,	0.534632585942745210,	0.538578454405069350,	
+0.542528338730335240,	0.546481993049383160,	0.550439231097698210,	0.554399792104959490,	0.558363504707813260,	0.562330115586519240,	0.566299438476562500,	0.570271246135234830,	
+0.574245333671569820,	0.578221492469310760,	0.582199502736330030,	0.586179181933403020,	0.590160276740789410,	0.594142623245716090,	0.598125983029603960,	0.602110169827938080,	
+0.606094967573881150,	0.610080175101757050,	0.614065583795309070,	0.618050977587699890,	0.622036151587963100,	0.626020893454551700,	0.630004994571208950,	0.633988231420516970,	
+0.637970402836799620,	0.641951277852058410,	0.645930647850036620,	0.649908289313316350,	0.653883971273899080,	0.657857488840818410,	0.661828581243753430,	0.665797054767608640,	
+0.669762641191482540,	0.673725124448537830,	0.677684243768453600,	0.681639779359102250,	0.685591462999582290,	0.689539063721895220,	0.693482317030429840,	0.697420965880155560,	
+0.701354760676622390,	0.705283410847187040,	0.709206689149141310,	0.713124278932809830,	0.717035952955484390,	0.720941375941038130,	0.724840316921472550,	0.728732451796531680,	
+0.732617516070604320,	0.736495196819305420,	0.740365199744701390,	0.744227230548858640,	0.748080968856811520,	0.751926124095916750,	0.755762357264757160,	0.759589381515979770,	
+0.763406842947006230,	0.767214450985193250,	0.771011855453252790,	0.774798732250928880,	0.778574761003255840,	0.782339565455913540,	0.786092851310968400,	0.789834223687648770,	
+0.793563373386859890,	0.797279909253120420,	0.800983514636754990,	0.804673787206411360,	0.808350402861833570,	0.812012966722249980,	0.815661124885082240,	0.819294504821300510,	
+0.822912722826004030,	0.826515413820743560,	0.830102190375328060,	0.833672653883695600,	0.837226435542106630,	0.840763118118047710,	0.844282336533069610,	0.847783654928207400,	
+0.851266715675592420,	0.854731071740388870,	0.858176350593566890,	0.861602116376161580,	0.865007970482110980,	0.868393491953611370,	0.871758259832859040,	0.875101849436759950,	
+0.878423850983381270,	0.881723806262016300,	0.885001312941312790,	0.888255912810564040,	0.891487173736095430,	0.894694659858942030,	0.897877920418977740,	0.901036512106657030,	
+0.904169965535402300,	0.907277844846248630,	0.910359673202037810,	0.913415014743804930,	0.916443370282649990,	0.919444311410188670,	0.922417331486940380,	0.925361987203359600,	
+0.928277771919965740,	0.931164238601922990,	0.934020876884460450,	0.936847217381000520,	0.939642757177352910,	0.942407000809907910,	0.945139460265636440,	0.947839632630348210,	
+0.950507018715143200,	0.953141096979379650,	0.955741371959447860,	0.958307322114706040,	0.960838429629802700,	0.963334184139966960,	0.965794049203395840,	0.968217510730028150,	
+0.970604017376899720,	0.972953058779239650,	0.975264083594083790,	0.977536566555500030,	0.979769956320524220,	0.981963708996772770,	0.984117280691862110,	0.986230112612247470,	
+0.988301653414964680,	0.990331344306468960,	0.992318630218505860,	0.994262944906950000,	0.996163722127676010,	0.998020399361848830,	0.999832402914762500,	1.001599155366420700,	
+1.003320086747407900,	1.004994612187147100,	1.006622135639190700,	1.008202098309993700,	1.009733878076076500,	1.011216927319765100,	1.012650609016418500,	1.014034371823072400,	
+1.015367589890956900,	1.016649682074785200,	1.017880033701658200,	1.019058048725128200,	1.020183108747005500,	1.021254621446132700,	1.022271949797868700,	1.023234523832798000,	
+
+};
+/* ----------------------------------------------------------------------
+** Test input - logarithmic chirp signal
+** ------------------------------------------------------------------- */
+
+float32_t testInput_f32[320] =
+  {
+    0.000000000000000061,	0.002622410992047861,	0.005253663973466970,	0.007893770384930297,	0.010542741395035495,	0.013200587895525877,	0.015867320496454066,	0.018542949521290073,	
+0.021227485001971542,	0.023920936673895138,	0.026623313970853074,	0.029334626019908643,	0.032054881636210709,	0.034784089317753723,	0.037522257240071598,	0.040269393250875855,	
+0.043025504864628375,	0.045790599257054837,	0.048564683259595690,	0.051347763353792118,	0.054139845665610427,	0.056940935959702531,	0.059751039633601337,	0.062570161711849828,	
+0.065398306840066575,	0.068235479278943648,	0.071081682898178900,	0.073936921170339814,	0.076801197164660218,	0.079674513540768196,	0.082556872542344922,	0.085448275990715375,	
+0.088348725278367082,	0.091258221362398390,	0.094176764757897533,	0.097104355531246703,	0.100040993293358240,	0.102986677192832010,	0.105941405909045980,	0.108905177645166230,	
+0.111877990121087980,	0.114859840566297130,	0.117850725712659680,	0.120850641787131110,	0.123859584504392860,	0.126877549059407400,	0.129904530119898690,	0.132940521818751430,	
+0.135985517746334080,	0.139039510942737950,	0.142102493889940090,	0.145174458503884160,	0.148255396126476810,	0.151345297517508140,	0.154444152846483080,	0.157551951684374300,	
+0.160668682995289720,	0.163794335128054890,	0.166928895807713030,	0.170072352126936720,	0.173224690537355760,	0.176385896840798810,	0.179555956180445340,	0.182734853031894270,	
+0.185922571194139130,	0.189119093780459800,	0.192324403209221870,	0.195538481194587030,	0.198761308737133020,	0.201992866114384050,	0.205233132871247170,	0.208482087810360570,	
+0.211739708982344370,	0.215005973675965020,	0.218280858408200220,	0.221564338914212730,	0.224856390137231970,	0.228156986218334190,	0.231466100486134670,	0.234783705446379690,	
+0.238109772771442410,	0.241444273289723230,	0.244787176974952890,	0.248138452935395580,	0.251498069402956710,	0.254865993722190930,	0.258242192339209860,	0.261626630790492030,	
+0.265019273691591620,	0.268420084725748410,	0.271829026632395280,	0.275246061195565440,	0.278671149232197430,	0.282104250580339830,	0.285545324087251580,	0.288994327597401960,	
+0.292451217940364990,	0.295915950918612280,	0.299388481295203350,	0.302868762781368150,	0.306356748023990040,	0.309852388592980640,	0.313355634968552230,	0.316866436528383590,	
+0.320384741534681720,	0.323910497121136620,	0.327443649279772870,	0.330984142847692230,	0.334531921493712690,	0.338086927704900790,	0.341649102772995210,	0.345218386780727190,	
+0.348794718588032520,	0.352378035818156910,	0.355968274843654950,	0.359565370772282730,	0.363169257432780890,	0.366779867360555120,	0.370397131783246010,	0.374020980606193880,	
+0.377651342397795690,	0.381288144374756830,	0.384931312387234990,	0.388580770903877330,	0.392236442996751310,	0.395898250326170650,	0.399566113125414350,	0.403239950185338420,	
+0.406919678838884410,	0.410605214945482130,	0.414296472875345100,	0.417993365493664670,	0.421695804144698540,	0.425403698635752780,	0.429116957221065130,	0.432835486585582130,	
+0.436559191828633180,	0.440287976447505720,	0.444021742320914510,	0.447760389692375140,	0.451503817153472210,	0.455251921627031540,	0.459004598350192470,	0.462761740857380200,	
+0.466523240963184150,	0.470288988745136360,	0.474058872526396560,	0.477832778858340690,	0.481610592503056990,	0.485392196415748600,	0.489177471727042850,	0.492966297725213780,	
+0.496758551838309250,	0.500554109616195060,	0.504352844712508190,	0.508154628866524960,	0.511959331884944910,	0.515766821623591440,	0.519576963969030530,	0.523389622820107150,	
+0.527204660069405030,	0.531021935584629400,	0.534841307189911630,	0.538662630647041900,	0.542485759636628150,	0.546310545739186690,	0.550136838416161340,	0.553964484990880020,	
+0.557793330629441700,	0.561623218321546380,	0.565453988861259300,	0.569285480827721570,	0.573117530565801950,	0.576949972166696630,	0.580782637448476910,	0.584615355936589420,	
+0.588447954844309340,	0.592280259053150400,	0.596112091093235260,	0.599943271123626440,	0.603773616912622660,	0.607602943818024150,	0.611431064767369080,	0.615257790238142090,	
+0.619082928237961740,	0.622906284284749700,	0.626727661386881850,	0.630546860023327600,	0.634363678123782030,	0.638177911048790960,	0.641989351569874020,	0.645797789849653410,	
+0.649603013421986450,	0.653404807172108140,	0.657202953316791350,	0.660997231384523490,	0.664787418195706640,	0.668573287842887610,	0.672354611671016960,	0.676131158257749170,	
+0.679902693393781730,	0.683668980063242500,	0.687429778424128110,	0.691184845788802130,	0.694933936604551380,	0.698676802434213370,	0.702413191936877570,	0.706142850848662460,	
+0.709865521963579990,	0.713580945114492330,	0.717288857154159800,	0.720988991936399870,	0.724681080297347790,	0.728364850036839040,	0.732040025899910680,	0.735706329558433620,	
+0.739363479592880620,	0.743011191474238440,	0.746649177546067850,	0.750277147006723990,	0.753894805891742180,	0.757501857056394940,	0.761098000158428880,	0.764682931640995540,	
+0.768256344715771980,	0.771817929346292900,	0.775367372231492210,	0.778904356789468790,	0.782428563141483460,	0.785939668096195860,	0.789437345134148760,	0.792921264392515420,	
+0.796391092650110770,	0.799846493312681210,	0.803287126398485760,	0.806712648524170680,	0.810122712890953390,	0.813516969271127150,	0.816895063994893090,	0.820256639937531280,	
+0.823601336506926020,	0.826928789631450890,	0.830238631748229430,	0.833530491791779850,	0.836803995183058700,	0.840058763818912760,	0.843294416061954100,	0.846510566730867220,	
+0.849706827091166740,	0.852882804846411770,	0.856038104129895340,	0.859172325496819990,	0.862285065916973510,	0.865375918767918860,	0.868444473828712590,	0.871490317274166260,	
+0.874513031669661770,	0.877512195966544280,	0.880487385498096800,	0.883438171976119850,	0.886364123488128100,	0.889264804495180530,	0.892139775830360640,	0.894988594697921020,	
+0.897810814673113080,	0.900605985702712770,	0.903373654106265470,	0.906113362578062300,	0.908824650189867690,	0.911507052394417540,	0.914160101029702910,	0.916783324324059180,	
+0.919376246902079860,	0.921938389791372770,	0.924469270430179120,	0.926968402675872660,	0.929435296814361430,	0.931869459570409790,	0.934270394118903560,	0.936637600097074200,	
+0.938970573617708970,	0.941268807283364040,	0.943531790201601380,	0.945759008001275100,	0.947949942849885320,	0.950104073472023970,	0.952220875168933280,	0.954299819839202090,	
+0.956340376000621160,	0.958342008813221960,	0.960304180103520260,	0.962226348389994210,	0.964107968909812760,	0.965948493646846980,	0.967747371360983650,	0.969504047618768740,	
+0.971217964825405680,	0.972888562258134030,	0.974515276101013520,	0.976097539481141750,	0.977634782506330400,	0.979126432304266880,	0.980571913063189360,	0.981970646074102120,	
+0.983322049774557390,	0.984625539794035220,	0.985880529000944810,	0.987086427551279730,	0.988242642938953360,	0.989348580047844540,	0.990403641205582440,	0.991407226239099710,	
+0.992358732531984260,	0.993257555083659870,	0.994103086570423680,	0.994894717408374870,	0.995631835818261310,	0.996313827892278070,	0.996940077662846650,	0.997509967173408010,	
+
+  };
diff --git a/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/arm_graphic_equalizer_example_q31.c b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/arm_graphic_equalizer_example_q31.c
new file mode 100644
index 0000000..5cd2a8a
--- /dev/null
+++ b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/arm_graphic_equalizer_example_q31.c
@@ -0,0 +1,411 @@
+/* ----------------------------------------------------------------------
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
+*
+* $Date:         17. January 2013
+* $Revision:     V1.4.0
+*
+* Project:       CMSIS DSP Library
+* Title:         arm_graphic_equalizer_example_q31.c
+*
+* Description:   Example showing an audio graphic equalizer constructed
+*                out of Biquad filters.
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+ * -------------------------------------------------------------------- */
+
+/**
+ * @ingroup groupExamples
+ */
+
+/**
+ * @defgroup GEQ5Band Graphic Audio Equalizer Example
+ *
+ * \par Description:
+ * \par
+ * This example demonstrates how a 5-band graphic equalizer can be constructed
+ * using the Biquad cascade functions.
+ * A graphic equalizer is used in audio applications to vary the tonal quality
+ * of the audio.
+ *
+ * \par Block Diagram:
+ * \par
+ * The design is based on a cascade of 5 filter sections.
+ * \image html GEQ_signalflow.gif
+ * Each filter section is 4th order and consists of a cascade of two Biquads.
+ * Each filter has a nominal gain of 0 dB (1.0 in linear units) and
+ * boosts or cuts signals within a specific frequency range.
+ * The edge frequencies between the 5 bands are 100, 500, 2000, and 6000 Hz.
+ * Each band has an adjustable boost or cut in the range of +/- 9 dB.
+ * For example, the band that extends from 500 to 2000 Hz has the response shown below:
+ * \par
+ * \image html GEQ_bandresponse.gif
+ * \par
+ * With 1 dB steps, each filter has a total of 19 different settings.
+ * The filter coefficients for all possible 19 settings were precomputed
+ * in MATLAB and stored in a table.  With 5 different tables, there are
+ * a total of 5 x 19 = 95 different 4th order filters.
+ * All 95 responses are shown below:
+ * \par
+ * \image html GEQ_allbandresponse.gif
+ * \par
+ * Each 4th order filter has 10 coefficents for a grand total of 950 different filter
+ * coefficients that must be tabulated. The input and output data is in Q31 format.
+ * For better noise performance, the two low frequency bands are implemented using the high
+ * precision 32x64-bit Biquad filters. The remaining 3 high frequency bands use standard
+ * 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp.
+ * \par
+ * \image html GEQ_inputchirp.gif
+ * \par
+ * The array <code>bandGains</code> specifies the gain in dB to apply in each band.
+ * For example, if <code>bandGains={0, -3, 6, 4, -6};</code> then the output signal will be:
+ * \par
+ * \image html GEQ_outputchirp.gif
+ * \par
+ * \note The output chirp signal follows the gain or boost of each band.
+ * \par
+ *
+ * \par Variables Description:
+ * \par
+ * \li \c testInput_f32 points to the input data
+ * \li \c testRefOutput_f32 points to the reference output data
+ * \li \c testOutput points to the test output data
+ * \li \c inputQ31 temporary input buffer
+ * \li \c outputQ31 temporary output buffer
+ * \li \c biquadStateBand1Q31 points to state buffer for band1
+ * \li \c biquadStateBand2Q31 points to state buffer for band2
+ * \li \c biquadStateBand3Q31 points to state buffer for band3
+ * \li \c biquadStateBand4Q31 points to state buffer for band4
+ * \li \c biquadStateBand5Q31 points to state buffer for band5
+ * \li \c coeffTable points to coefficient buffer for all bands
+ * \li \c gainDB gain buffer which has gains applied for all the bands
+ *
+ * \par CMSIS DSP Software Library Functions Used:
+ * \par
+ * - arm_biquad_cas_df1_32x64_init_q31()
+ * - arm_biquad_cas_df1_32x64_q31()
+ * - arm_biquad_cascade_df1_init_q31()
+ * - arm_biquad_cascade_df1_q31()
+ * - arm_scale_q31()
+ * - arm_scale_f32()
+ * - arm_float_to_q31()
+ * - arm_q31_to_float()
+ *
+ * <b> Refer  </b>
+ * \link arm_graphic_equalizer_example_q31.c \endlink
+ *
+ */
+
+
+/** \example arm_graphic_equalizer_example_q31.c
+ */
+
+
+#include "arm_math.h"
+#include "math_helper.h"
+
+/* Length of the overall data in the test */
+#define TESTLENGTH 320
+
+/* Block size for the underlying processing */
+#define BLOCKSIZE 32
+
+/* Total number of blocks to run */
+#define NUMBLOCKS (TESTLENGTH/BLOCKSIZE)
+
+/* Number of 2nd order Biquad stages per filter */
+#define NUMSTAGES 2
+
+#define SNR_THRESHOLD_F32  98
+
+/* -------------------------------------------------------------------
+ * External Declarations for Input and Output buffers
+ * ------------------------------------------------------------------- */
+
+extern float32_t testInput_f32[TESTLENGTH];
+static float32_t testOutput[TESTLENGTH];
+
+extern float32_t testRefOutput_f32[TESTLENGTH];
+
+/* ----------------------------------------------------------------------
+** Q31 state buffers for Band1, Band2, Band3, Band4, Band5
+** ------------------------------------------------------------------- */
+
+static q63_t biquadStateBand1Q31[4 * 2];
+static q63_t biquadStateBand2Q31[4 * 2];
+static q31_t biquadStateBand3Q31[4 * 2];
+static q31_t biquadStateBand4Q31[4 * 2];
+static q31_t biquadStateBand5Q31[4 * 2];
+
+/* ----------------------------------------------------------------------
+** Q31 input and output buffers
+** ------------------------------------------------------------------- */
+
+q31_t inputQ31[BLOCKSIZE];
+q31_t outputQ31[BLOCKSIZE];
+
+/* ----------------------------------------------------------------------
+** Entire coefficient table.  There are 10 coefficients per 4th order Biquad
+** cascade filter.  The first 10 coefficients correspond to the -9 dB gain
+** setting of band 1; the next 10 coefficient correspond to the -8 dB gain
+** setting of band 1; and so on.  There are 10*19=190 coefficients in total
+** for band 1 (gains = -9, -8, -7, ..., 9).  After this come the 190 coefficients
+** for band 2.
+**
+** The coefficients are in Q29 format and require a postShift of 2.
+** ------------------------------------------------------------------- */
+
+const q31_t coeffTable[950] = {
+
+  /* Band 1, -9 dB gain */
+  535576962, -1071153923, 535576962, 1073741824, -536870912, 535576962, -1063501998, 527979313, 1060865294, -524146981,
+  /* Band 1, -8 dB gain */
+  535723226, -1071446451, 535723226, 1073741824, -536870912, 535723226, -1063568947, 527903217, 1061230578, -524503778,
+  535868593, -1071737186, 535868593, 1073741824, -536870912, 535868593, -1063627467, 527819780, 1061585502, -524850686,
+  536013181, -1072026363, 536013181, 1073741824, -536870912, 536013181, -1063677598, 527728935, 1061930361, -525187972,
+  536157109, -1072314217, 536157109, 1073741824, -536870912, 536157109, -1063719372, 527630607, 1062265438, -525515897,
+  536300492, -1072600983, 536300492, 1073741824, -536870912, 536300492, -1063752815, 527524720, 1062591011, -525834716,
+  536443447, -1072886894, 536443447, 1073741824, -536870912, 536443447, -1063777945, 527411186, 1062907350, -526144676,
+  536586091, -1073172183, 536586091, 1073741824, -536870912, 536586091, -1063794775, 527289917, 1063214717, -526446017,
+  536728541, -1073457082, 536728541, 1073741824, -536870912, 536728541, -1063803308, 527160815, 1063513366, -526738975,
+  536870912, -1073741824, 536870912, 1073741824, -536870912, 536870912, -1063803543, 527023777, 1063803543, -527023777,
+  537013321, -1074026642, 537013321, 1073741824, -536870912, 537013321, -1063795470, 526878696, 1064085490, -527300648,
+  537155884, -1074311768, 537155884, 1073741824, -536870912, 537155884, -1063779073, 526725455, 1064359439, -527569803,
+  537298718, -1074597435, 537298718, 1073741824, -536870912, 537298718, -1063754328, 526563934, 1064625617, -527831454,
+  537441939, -1074883878, 537441939, 1073741824, -536870912, 537441939, -1063721205, 526394005, 1064884245, -528085806,
+  537585666, -1075171331, 537585666, 1073741824, -536870912, 537585666, -1063679666, 526215534, 1065135536, -528333059,
+  537730015, -1075460030, 537730015, 1073741824, -536870912, 537730015, -1063629666, 526028380, 1065379699, -528573409,
+  537875106, -1075750212, 537875106, 1073741824, -536870912, 537875106, -1063571152, 525832396, 1065616936, -528807045,
+  538021057, -1076042114, 538021057, 1073741824, -536870912, 538021057, -1063504065, 525627429, 1065847444, -529034151,
+  538167989, -1076335977, 538167989, 1073741824, -536870912, 538167989, -1063428338, 525413317, 1066071412, -529254907,
+
+  /* Band 2, -9 dB gain */
+  531784976, -1055497692, 523873415, 1066213307, -529420241, 531784976, -1040357886, 509828014, 1028908252, -494627367,
+  /* Band 2, -8 dB gain */
+  532357636, -1056601982, 524400080, 1066115844, -529326645, 532357636, -1040623406, 509562600, 1030462237, -496062122,
+  532927392, -1057707729, 524931110, 1066024274, -529239070, 532927392, -1040848253, 509262081, 1031969246, -497457090,
+  533494678, -1058816094, 525467240, 1065939047, -529157961, 533494678, -1041032161, 508925950, 1033429976, -498812573,
+  534059929, -1059928204, 526009170, 1065860582, -529083734, 534059929, -1041174868, 508553717, 1034845124, -500128887,
+  534623580, -1061045148, 526557561, 1065789260, -529016764, 534623580, -1041276126, 508144920, 1036215393, -501406373,
+  535186068, -1062167969, 527113032, 1065725420, -528957385, 535186068, -1041335703, 507699125, 1037541500, -502645399,
+  535747827, -1063297666, 527676151, 1065669351, -528905879, 535747827, -1041353386, 507215934, 1038824183, -503846368,
+  536309295, -1064435183, 528247436, 1065621289, -528862476, 536309295, -1041328990, 506694984, 1040064203, -505009724,
+  536870912, -1065581413, 528827349, 1065581413, -528827349, 536870912, -1041262354, 506135953, 1041262354, -506135953,
+  537433117, -1066737194, 529416295, 1065549847, -528800610, 537433117, -1041153346, 505538564, 1042419457, -507225588,
+  537996352, -1067903307, 530014622, 1065526651, -528782316, 537996352, -1041001864, 504902578, 1043536370, -508279208,
+  538561061, -1069080480, 530622620, 1065511830, -528772462, 538561061, -1040807833, 504227800, 1044613981, -509297437,
+  539127690, -1070269387, 531240527, 1065505333, -528770987, 539127690, -1040571205, 503514074, 1045653211, -510280946,
+  539696690, -1071470656, 531868525, 1065507054, -528777778, 539696690, -1040291951, 502761277, 1046655011, -511230450,
+  540268512, -1072684867, 532506750, 1065516837, -528792672, 540268512, -1039970063, 501969320, 1047620358, -512146700,
+  540843613, -1073912567, 533155297, 1065534483, -528815459, 540843613, -1039605542, 501138139, 1048550251, -513030484,
+  541422451, -1075154268, 533814224, 1065559750, -528845892, 541422451, -1039198394, 500267687, 1049445708, -513882621,
+  542005489, -1076410460, 534483561, 1065592362, -528883686, 542005489, -1038748624, 499357932, 1050307760, -514703956,
+  518903861, -1001986830, 486725277, 1037235801, -502367695, 518903861, -945834422, 446371043, 902366163, -400700571,
+  520899989, -1005630916, 488289126, 1036926846, -502147311, 520899989, -946490935, 445581846, 907921945, -404936158,
+  522893209, -1009290002, 489869792, 1036650484, -501961419, 522893209, -947006359, 444685310, 913306106, -409075225,
+  524884763, -1012968199, 491470256, 1036407567, -501810737, 524884763, -947377809, 443679533, 918521018, -413116221,
+  526875910, -1016669649, 493093518, 1036198712, -501695739, 526875910, -947602324, 442562672, 923569247, -417057897,
+  528867927, -1020398503, 494742575, 1036024293, -501616651, 528867927, -947676875, 441332970, 928453558, -420899319,
+  530862111, -1024158905, 496420407, 1035884447, -501573457, 530862111, -947598385, 439988777, 933176909, -424639872,
+  532859778, -1027954970, 498129955, 1035779077, -501565907, 532859778, -947363742, 438528571, 937742446, -428279254,
+  534862260, -1031790763, 499874098, 1035707863, -501593525, 534862260, -946969823, 436950987, 942153486, -431817474,
+  536870912, -1035670279, 501655630, 1035670279, -501655630, 536870912, -946413508, 435254839, 946413508, -435254839,
+  538887107, -1039597419, 503477238, 1035665609, -501751354, 538887107, -945691703, 433439146, 950526127, -438591937,
+  540912240, -1043575967, 505341475, 1035692963, -501879659, 540912240, -944801359, 431503152, 954495080, -441829621,
+  542947726, -1047609569, 507250741, 1035751307, -502039364, 542947726, -943739490, 429446349, 958324201, -444968987,
+  544995000, -1051701717, 509207261, 1035839473, -502229165, 544995000, -942503190, 427268492, 962017400, -448011351,
+  547055523, -1055855728, 511213065, 1035956193, -502447657, 547055523, -941089647, 424969617, 965578640, -450958226,
+  549130774, -1060074734, 513269973, 1036100110, -502693359, 549130774, -939496155, 422550049, 969011913, -453811298,
+  551222259, -1064361672, 515379585, 1036269804, -502964731, 551222259, -937720119, 420010407, 972321228, -456572401,
+  553331507, -1068719280, 517543273, 1036463810, -503260192, 553331507, -935759057, 417351601, 975510582, -459243495,
+  555460072, -1073150100, 519762181, 1036680633, -503578144, 555460072, -933610600, 414574832, 978583948, -461826644,
+  494084017, -851422604, 404056273, 930151631, -423619864, 494084017, -673714108, 339502486, 561843007, -265801750,
+  498713542, -859177141, 406587077, 929211656, -423786402, 498713542, -673274906, 338185129, 573719128, -272222942,
+  503369016, -867012190, 409148384, 928362985, -424054784, 503369016, -672533059, 336693984, 585290277, -278599028,
+  508052536, -874935599, 411746438, 927604291, -424422151, 508052536, -671478538, 335026905, 596558312, -284920289,
+  512766286, -882955583, 414387826, 926933782, -424885216, 512766286, -670100998, 333182045, 607525792, -291177811,
+  517512534, -891080712, 417079474, 926349262, -425440318, 517512534, -668389789, 331157902, 618195914, -297363485,
+  522293635, -899319903, 419828635, 925848177, -426083491, 522293635, -666333963, 328953368, 628572440, -303470012,
+  527112032, -907682405, 422642886, 925427679, -426810526, 527112032, -663922286, 326567785, 638659631, -309490882,
+  531970251, -916177781, 425530105, 925084675, -427617023, 531970251, -661143261, 324000998, 648462180, -315420352,
+  536870912, -924815881, 428498454, 924815881, -428498454, 536870912, -657985147, 321253420, 657985147, -321253420,
+  541816719, -933606817, 431556352, 924617870, -429450209, 541816719, -654435997, 318326093, 667233900, -326985786,
+  546810467, -942560921, 434712438, 924487114, -430467639, 546810467, -650483688, 315220754, 676214053, -332613816,
+  551855042, -951688708, 437975532, 924420027, -431546101, 551855042, -646115970, 311939896, 684931422, -338134495,
+  556953421, -961000826, 441354588, 924413001, -432680993, 556953421, -641320513, 308486839, 693391970, -343545389,
+  562108672, -970508005, 444858642, 924462435, -433867780, 562108672, -636084967, 304865786, 701601770, -348844597,
+  567323959, -980220994, 448496743, 924564764, -435102022, 567323959, -630397020, 301081886, 709566963, -354030710,
+  572602539, -990150500, 452277894, 924716482, -436379394, 572602539, -624244471, 297141281, 717293726, -359102767,
+  577947763, -1000307125, 456210977, 924914158, -437695705, 577947763, -617615296, 293051155, 724788245, -364060214,
+  583363084, -1010701292, 460304674, 925154455, -439046908, 583363084, -610497723, 288819761, 732056685, -368902865,
+  387379495, -506912469, 196933274, 840112184, -347208270, 387379495, 506912469, 196933274, -840112184, -347208270,
+  401658082, -532275898, 207149427, 833765363, -343175316, 401658082, 532275898, 207149427, -833765363, -343175316,
+  416472483, -558722695, 217902617, 827270154, -339107319, 416472483, 558722695, 217902617, -827270154, -339107319,
+  431841949, -586290861, 229212798, 820624988, -335007540, 431841949, 586290861, 229212798, -820624988, -335007540,
+  447786335, -615019650, 241100489, 813828443, -330879528, 447786335, 615019650, 241100489, -813828443, -330879528,
+  464326111, -644949597, 253586805, 806879270, -326727141, 464326111, 644949597, 253586805, -806879270, -326727141,
+  481482377, -676122557, 266693475, 799776409, -322554559, 481482377, 676122557, 266693475, -799776409, -322554559,
+  499276882, -708581728, 280442865, 792519013, -318366296, 499276882, 708581728, 280442865, -792519013, -318366296,
+  517732032, -742371685, 294857996, 785106465, -314167221, 517732032, 742371685, 294857996, -785106465, -314167221,
+  536870912, -777538408, 309962566, 777538408, -309962566, 536870912, 777538408, 309962566, -777538408, -309962566,
+  556717294, -814129313, 325780968, 769814766, -305757943, 556717294, 814129313, 325780968, -769814766, -305757943,
+  577295658, -852193284, 342338310, 761935777, -301559360, 577295658, 852193284, 342338310, -761935777, -301559360,
+  598631206, -891780698, 359660433, 753902014, -297373230, 598631206, 891780698, 359660433, -753902014, -297373230,
+  620749877, -932943463, 377773927, 745714425, -293206383, 620749877, 932943463, 377773927, -745714425, -293206383,
+  643678365, -975735041, 396706151, 737374355, -289066077, 643678365, 975735041, 396706151, -737374355, -289066077,
+  667444134, -1020210487, 416485252, 728883588, -284960004, 667444134, 1020210487, 416485252, -728883588, -284960004,
+  692075438, -1066426476, 437140179, 720244375, -280896294, 692075438, 1066426476, 437140179, -720244375, -280896294,
+  717601336, -1114441339, 458700704, 711459472, -276883515, 717601336, 1114441339, 458700704, -711459472, -276883515,
+  744051710, -1164315096, 481197437, 702532174, -272930673, 744051710, 1164315096, 481197437, -702532174, -272930673
+
+};
+
+/* ----------------------------------------------------------------------
+** Desired gains, in dB, per band
+** ------------------------------------------------------------------- */
+
+int gainDB[5] = {0, -3, 6, 4, -6};
+
+float32_t snr;
+
+
+/* ----------------------------------------------------------------------
+ * Graphic equalizer Example
+ * ------------------------------------------------------------------- */
+
+int32_t main(void)
+{
+  float32_t  *inputF32, *outputF32;
+  arm_biquad_cas_df1_32x64_ins_q31 S1;
+  arm_biquad_cas_df1_32x64_ins_q31 S2;
+  arm_biquad_casd_df1_inst_q31 S3;
+  arm_biquad_casd_df1_inst_q31 S4;
+  arm_biquad_casd_df1_inst_q31 S5;
+  int i;
+  int32_t status;
+
+  inputF32 = &testInput_f32[0];
+  outputF32 = &testOutput[0];
+
+  /* Initialize the state and coefficient buffers for all Biquad sections */
+
+  arm_biquad_cas_df1_32x64_init_q31(&S1, NUMSTAGES,
+            (q31_t *) &coeffTable[190*0 + 10*(gainDB[0] + 9)],
+            &biquadStateBand1Q31[0], 2);
+
+  arm_biquad_cas_df1_32x64_init_q31(&S2, NUMSTAGES,
+            (q31_t *) &coeffTable[190*1 + 10*(gainDB[1] + 9)],
+            &biquadStateBand2Q31[0], 2);
+
+  arm_biquad_cascade_df1_init_q31(&S3, NUMSTAGES,
+          (q31_t *) &coeffTable[190*2 + 10*(gainDB[2] + 9)],
+          &biquadStateBand3Q31[0], 2);
+
+  arm_biquad_cascade_df1_init_q31(&S4, NUMSTAGES,
+          (q31_t *) &coeffTable[190*3 + 10*(gainDB[3] + 9)],
+          &biquadStateBand4Q31[0], 2);
+
+  arm_biquad_cascade_df1_init_q31(&S5, NUMSTAGES,
+          (q31_t *) &coeffTable[190*4 + 10*(gainDB[4] + 9)],
+          &biquadStateBand5Q31[0], 2);
+
+
+  /* Call the process functions and needs to change filter coefficients
+     for varying the gain of each band */
+
+  for(i=0; i < NUMBLOCKS; i++)
+  {
+
+    /* ----------------------------------------------------------------------
+    ** Convert block of input data from float to Q31
+    ** ------------------------------------------------------------------- */
+
+    arm_float_to_q31(inputF32 + (i*BLOCKSIZE), inputQ31, BLOCKSIZE);
+
+    /* ----------------------------------------------------------------------
+    ** Scale down by 1/8.  This provides additional headroom so that the
+    ** graphic EQ can apply gain.
+    ** ------------------------------------------------------------------- */
+
+    arm_scale_q31(inputQ31, 0x7FFFFFFF, -3, inputQ31, BLOCKSIZE);
+
+    /* ----------------------------------------------------------------------
+    ** Call the Q31 Biquad Cascade DF1 32x64 process function for band1, band2
+    ** ------------------------------------------------------------------- */
+
+    arm_biquad_cas_df1_32x64_q31(&S1, inputQ31, outputQ31, BLOCKSIZE);
+    arm_biquad_cas_df1_32x64_q31(&S2, outputQ31, outputQ31, BLOCKSIZE);
+
+    /* ----------------------------------------------------------------------
+    ** Call the Q31 Biquad Cascade DF1 process function for band3, band4, band5
+    ** ------------------------------------------------------------------- */
+
+    arm_biquad_cascade_df1_q31(&S3, outputQ31, outputQ31, BLOCKSIZE);
+    arm_biquad_cascade_df1_q31(&S4, outputQ31, outputQ31, BLOCKSIZE);
+    arm_biquad_cascade_df1_q31(&S5, outputQ31, outputQ31, BLOCKSIZE);
+
+    /* ----------------------------------------------------------------------
+    ** Convert Q31 result back to float
+    ** ------------------------------------------------------------------- */
+
+    arm_q31_to_float(outputQ31, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
+
+    /* ----------------------------------------------------------------------
+    ** Scale back up
+    ** ------------------------------------------------------------------- */
+
+    arm_scale_f32(outputF32 + (i * BLOCKSIZE), 8.0f, outputF32 + (i * BLOCKSIZE), BLOCKSIZE);
+  };
+
+  snr = arm_snr_f32(testRefOutput_f32, testOutput, TESTLENGTH);
+
+  if (snr < SNR_THRESHOLD_F32)
+  {
+    status = ARM_MATH_TEST_FAILURE;
+  }
+  else
+  {
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* ----------------------------------------------------------------------
+  ** Loop here if the signal does not match the reference output.
+  ** ------------------------------------------------------------------- */
+
+  if( status != ARM_MATH_SUCCESS)
+  {
+    while(1);
+  }
+
+  while(1);                             /* main function does not return */
+}
+
+/** \endlink */
+
+
+
diff --git a/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.c b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.c
new file mode 100644
index 0000000..dbf2cfe
--- /dev/null
+++ b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.c
@@ -0,0 +1,458 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0    
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.c
+*
+* Description:	Definition of all helper functions required.  
+*  
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+/* ----------------------------------------------------------------------
+*		Include standard header files  
+* -------------------------------------------------------------------- */
+#include<math.h>
+
+/* ----------------------------------------------------------------------
+*		Include project header files  
+* -------------------------------------------------------------------- */
+#include "math_helper.h"
+
+/** 
+ * @brief  Caluclation of SNR
+ * @param  float* 	Pointer to the reference buffer
+ * @param  float*	Pointer to the test buffer
+ * @param  uint32_t	total number of samples
+ * @return float	SNR
+ * The function Caluclates signal to noise ratio for the reference output 
+ * and test output 
+ */
+
+float arm_snr_f32(float *pRef, float *pTest, uint32_t buffSize)
+{
+  float EnergySignal = 0.0, EnergyError = 0.0;
+  uint32_t i;
+  float SNR;
+  int temp;
+  int *test;
+
+  for (i = 0; i < buffSize; i++)
+    {
+ 	  /* Checking for a NAN value in pRef array */
+	  test =   (int *)(&pRef[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+
+	  /* Checking for a NAN value in pTest array */
+	  test =   (int *)(&pTest[i]);
+      temp =  *test;
+
+	  if(temp == 0x7FC00000)
+	  {
+	  		return(0);
+	  }
+      EnergySignal += pRef[i] * pRef[i];
+      EnergyError += (pRef[i] - pTest[i]) * (pRef[i] - pTest[i]); 
+    }
+
+	/* Checking for a NAN value in EnergyError */
+	test =   (int *)(&EnergyError);
+    temp =  *test;
+
+    if(temp == 0x7FC00000)
+    {
+  		return(0);
+    }
+	
+
+  SNR = 10 * log10 (EnergySignal / EnergyError);
+
+  return (SNR);
+
+}
+
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q15_t* 	    Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q15 (q15_t * input_buf, uint32_t blockSize,
+                            uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed in q12.20 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point(q12.20) values 
+ */
+
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1048576.0f corresponds to pow(2, 20) */
+      pOut[i] = (q31_t) (pIn[i] * 1048576.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 1.0)
+        {
+          pOut[i] = 0x000FFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q15_t* 	Pointer to Ref buffer
+ * @param  q15_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}	
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Compare MATLAB Reference Output and ARM Test output
+ * @param  q31_t* 	Pointer to Ref buffer
+ * @param  q31_t* 	Pointer to Test buffer
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none 
+ */
+
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t * pOut, uint32_t numSamples)
+{
+  uint32_t i; 
+  int32_t diff, diffCrnt = 0;
+  uint32_t maxDiff = 0;
+
+  for (i = 0; i < numSamples; i++)
+  {
+  	diff = pIn[i] - pOut[i];
+  	diffCrnt = (diff > 0) ? diff : -diff;
+
+	if(diffCrnt > maxDiff)
+	{
+		maxDiff = diffCrnt;
+	}
+  }
+
+  return(maxDiff);
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q31 (q31_t * input_buf, 
+								 uint32_t blockSize,
+                                 uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+/** 
+ * @brief  Provide guard bits for Input buffer
+ * @param  q31_t* 	Pointer to input buffer
+ * @param  uint32_t 	blockSize
+ * @param  uint32_t 	guard_bits
+ * @return none
+ * The function Provides the guard bits for the buffer 
+ * to avoid overflow 
+ */
+
+void arm_provide_guard_bits_q7 (q7_t * input_buf, 
+								uint32_t blockSize,
+                                uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < blockSize; i++)
+    {
+      input_buf[i] = input_buf[i] >> guard_bits;
+    }
+}
+
+
+
+/** 
+ * @brief  Caluclates number of guard bits 
+ * @param  uint32_t 	number of additions
+ * @return none
+ * The function Caluclates the number of guard bits  
+ * depending on the numtaps 
+ */
+
+uint32_t arm_calc_guard_bits (uint32_t num_adds)
+{
+  uint32_t i = 1, j = 0;
+
+  if (num_adds == 1)
+    {
+      return (0);
+    }
+
+  while (i < num_adds)
+    {
+      i = i * 2;
+      j++;
+    }
+
+  return (j);
+}
+
+/** 
+ * @brief  Converts Q15 to floating-point
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ */
+
+void arm_apply_guard_bits (float32_t * pIn, 
+						   uint32_t numSamples, 
+						   uint32_t guard_bits)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      pIn[i] = pIn[i] * arm_calc_2pow(guard_bits);
+    }
+}
+
+/** 
+ * @brief  Calculates pow(2, numShifts)
+ * @param  uint32_t 	number of shifts
+ * @return pow(2, numShifts)
+ */
+uint32_t arm_calc_2pow(uint32_t numShifts)
+{
+
+  uint32_t i, val = 1;
+
+  for (i = 0; i < numShifts; i++)
+    {
+      val = val * 2;
+    }	
+
+  return(val);
+}
+
+
+
+/** 
+ * @brief  Converts float to fixed q14 
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q14 (float *pIn, q15_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 16384.0f corresponds to pow(2, 14) */
+      pOut[i] = (q15_t) (pIn[i] * 16384.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFF;
+        }
+
+    }
+
+}
+
+ 
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q30 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 1073741824.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 2.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Converts float to fixed q30 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q29 (float *pIn, q31_t * pOut, 
+					   uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	  /* 1073741824.0f corresponds to pow(2, 30) */
+      pOut[i] = (q31_t) (pIn[i] * 536870912.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 4.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+
+/** 
+ * @brief  Converts float to fixed q28 format
+ * @param  uint32_t 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_float_to_q28 (float *pIn, q31_t * pOut, 
+                       uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+	/* 268435456.0f corresponds to pow(2, 28) */
+      pOut[i] = (q31_t) (pIn[i] * 268435456.0f);
+
+      pOut[i] += pIn[i] > 0 ? 0.5 : -0.5;
+
+      if (pIn[i] == (float) 8.0)
+        {
+          pOut[i] = 0x7FFFFFFF;
+        }
+    }
+}
+
+/** 
+ * @brief  Clip the float values to +/- 1 
+ * @param  pIn 	input buffer
+ * @param  numSamples 	number of samples in the buffer
+ * @return none
+ * The function converts floating point values to fixed point values 
+ */
+
+void arm_clip_f32 (float *pIn, uint32_t numSamples)
+{
+  uint32_t i;
+
+  for (i = 0; i < numSamples; i++)
+    {
+      if(pIn[i] > 1.0f)
+	  {
+	    pIn[i] = 1.0;
+	  }
+	  else if( pIn[i] < -1.0f)
+	  {
+	    pIn[i] = -1.0;
+	  }
+	       
+    }
+}
+
+
+
+
diff --git a/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.h b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.h
new file mode 100644
index 0000000..46b0af3
--- /dev/null
+++ b/DSP_Lib/Examples/arm_graphic_equalizer_example/ARM/math_helper.h
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2013 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*  
+* Project: 	    CMSIS DSP Library 
+*
+* Title:	    math_helper.h
+* 
+* Description:	Prototypes of all helper functions required.  
+*
+* Target Processor: Cortex-M4/Cortex-M3
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+* -------------------------------------------------------------------- */
+
+
+#include "arm_math.h"
+
+#ifndef MATH_HELPER_H
+#define MATH_HELPER_H
+
+float arm_snr_f32(float *pRef, float *pTest,  uint32_t buffSize);  
+void arm_float_to_q12_20(float *pIn, q31_t * pOut, uint32_t numSamples);
+void arm_provide_guard_bits_q15(q15_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_provide_guard_bits_q31(q31_t *input_buf, uint32_t blockSize, uint32_t guard_bits);
+void arm_float_to_q14(float *pIn, q15_t *pOut, uint32_t numSamples);
+void arm_float_to_q29(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q28(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_float_to_q30(float *pIn, q31_t *pOut, uint32_t numSamples);
+void arm_clip_f32(float *pIn, uint32_t numSamples);
+uint32_t arm_calc_guard_bits(uint32_t num_adds);
+void arm_apply_guard_bits (float32_t * pIn, uint32_t numSamples, uint32_t guard_bits);
+uint32_t arm_compare_fixed_q15(q15_t *pIn, q15_t * pOut, uint32_t numSamples);
+uint32_t arm_compare_fixed_q31(q31_t *pIn, q31_t *pOut, uint32_t numSamples);
+uint32_t arm_calc_2pow(uint32_t guard_bits);
+#endif
+
diff --git a/DSP_Lib/Examples/arm_linear_interp_example/ARM/Abstract.txt b/DSP_Lib/Examples/arm_linear_interp_example/ARM/Abstract.txt
new file mode 100644
index 0000000..eef467a
--- /dev/null
+++ b/DSP_Lib/Examples/arm_linear_interp_example/ARM/Abstract.txt
@@ -0,0 +1,4 @@
+CMSIS DSP_Lib example arm_linear_interp_example for
+  Cortex-M0, Cortex-M3 and Cortex-M4 with FPU
+
+The example is configured for uVision Simulator
diff --git a/DSP_Lib/Examples/arm_linear_interp_example/ARM/arm_linear_interp_data.c b/DSP_Lib/Examples/arm_linear_interp_example/ARM/arm_linear_interp_data.c
new file mode 100644
index 0000000..5a53ec6
--- /dev/null
+++ b/DSP_Lib/Examples/arm_linear_interp_example/ARM/arm_linear_interp_data.c
@@ -0,0 +1,23616 @@
+/* ----------------------------------------------------------------------   
+* Copyright (C) 2010-2012 ARM Limited. All rights reserved.   
+*   
+* $Date:        17. January 2013  
+* $Revision: 	V1.4.0   
+*   
+* Project: 	    CMSIS DSP Library   
+* Title:	     	arm_linear_interp_data.c
+*   
+* Description:	 Data file used for example.  Generation method described
+*               below
+*   
+* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
+*  
+* Redistribution and use in source and binary forms, with or without 
+* modification, are permitted provided that the following conditions
+* are met:
+*   - Redistributions of source code must retain the above copyright
+*     notice, this list of conditions and the following disclaimer.
+*   - Redistributions in binary form must reproduce the above copyright
+*     notice, this list of conditions and the following disclaimer in
+*     the documentation and/or other materials provided with the 
+*     distribution.
+*   - Neither the name of ARM LIMITED nor the names of its contributors
+*     may be used to endorse or promote products derived from this
+*     software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
+* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.  
+ * -------------------------------------------------------------------- */
+ 
+/* ---------------------------------------------------------------------- 
+* Table generated from following MATLAB Command
+* x = -pi: 0.00005 : (2*pi - 0.00005);
+* y = sin(x);
+* where pi value is 3.141592653589793
+* --------------------------------------------------------------------*/
+
+float arm_linear_interep_table[188495] =  {
+
+
+-0.000000000000000122,	-0.000049999999979173,	-0.000099999999833667,	-0.000149999999437717,	-0.000199999998666767,	-0.000249999997395817,	-0.000299999995500311,	-0.000349999992854362,	
+-0.000399999989333412,	-0.000449999984812462,	-0.000499999979166956,	-0.000549999972271007,	-0.000599999964000057,	-0.000649999954229107,	-0.000699999942833602,	-0.000749999929687653,	
+-0.000799999914666704,	-0.000849999897645755,	-0.000899999878500250,	-0.000949999857104302,	-0.000999999833333354,	-0.001049999807062851,	-0.001099999778166904,	-0.001149999746520957,	
+-0.001199999712000011,	-0.001249999674479510,	-0.001299999633833566,	-0.001349999589937622,	-0.001399999542666680,	-0.001449999491896183,	-0.001499999437500243,	-0.001549999379354304,	
+-0.001599999317333367,	-0.001649999251312876,	-0.001699999181166942,	-0.001749999106771011,	-0.001799999028000082,	-0.001849998944729599,	-0.001899998856833675,	-0.001949998764187754,	
+-0.001999998666666836,	-0.002049998564146365,	-0.002099998456500453,	-0.002149998343604546,	-0.002199998225334087,	-0.002249998101563188,	-0.002299997972167294,	-0.002349997837021405,	
+-0.002399997696000966,	-0.002449997548980088,	-0.002499997395834216,	-0.002549997236438351,	-0.002599997070667937,	-0.002649996898397086,	-0.002699996719501243,	-0.002749996533855408,	
+-0.002799996341335026,	-0.002849996141814208,	-0.002899995935168401,	-0.002949995721272604,	-0.002999995500002261,	-0.003049995271231486,	-0.003099995034835722,	-0.003149994790690415,	
+-0.003199994538669677,	-0.003249994278648952,	-0.003299994010503243,	-0.003349993734107991,	-0.003399993449337312,	-0.003449993156066649,	-0.003499992854171003,	-0.003549992543525819,	
+-0.003599992224005209,	-0.003649991895484619,	-0.003699991557839049,	-0.003749991210943944,	-0.003799990854673418,	-0.003849990488902914,	-0.003899990113507434,	-0.003949989728362423,	
+-0.003999989333341993,	-0.004049988928321590,	-0.004099988513176658,	-0.004149988087781312,	-0.004199987652010995,	-0.004249987205740709,	-0.004299986748845899,	-0.004349986281200678,	
+-0.004399985802680492,	-0.004449985313160341,	-0.004499984812515671,	-0.004549984300620594,	-0.004599983777350557,	-0.004649983242580561,	-0.004699982696186050,	-0.004749982138041138,	
+-0.004799981568021272,	-0.004849980986001451,	-0.004899980391857122,	-0.004949979785462398,	-0.004999979166692725,	-0.005049978535423547,	-0.005099977891528979,	-0.005149977234884466,	
+-0.005199976565365011,	-0.005249975882846058,	-0.005299975187201721,	-0.005349974478307446,	-0.005399973756038235,	-0.005449973020269535,	-0.005499972270875456,	-0.005549971507731448,	
+-0.005599970730712511,	-0.005649969939694091,	-0.005699969134550302,	-0.005749968315156590,	-0.005799967481387958,	-0.005849966633119851,	-0.005899965770226383,	-0.005949964892583000,	
+-0.005999964000064706,	-0.006049963092546945,	-0.006099962169903833,	-0.006149961232010816,	-0.006199960278743339,	-0.006249959309975518,	-0.006299958325582797,	-0.006349957325440182,	
+-0.006399956309423117,	-0.006449955277405718,	-0.006499954229263430,	-0.006549953164871257,	-0.006599952084104644,	-0.006649950986837708,	-0.006699949872945895,	-0.006749948742304206,	
+-0.006799947594788089,	-0.006849946430271660,	-0.006899945248630365,	-0.006949944049739206,	-0.006999942833473632,	-0.007049941599707755,	-0.007099940348317025,	-0.007149939079176889,	
+-0.007199937792161461,	-0.007249936487146187,	-0.007299935164006074,	-0.007349933822616566,	-0.007399932462851779,	-0.007449931084587162,	-0.007499929687697716,	-0.007549928272058891,	
+-0.007599926837544801,	-0.007649925384030893,	-0.007699923911392173,	-0.007749922419504085,	-0.007799920908240749,	-0.007849919377477610,	-0.007899917827089672,	-0.007949916256952384,	
+-0.007999914666939863,	-0.008049913056927554,	-0.008099911426790906,	-0.008149909776404035,	-0.008199908105642390,	-0.008249906414380975,	-0.008299904702495238,	-0.008349902969859295,	
+-0.008399901216348595,	-0.008449899441838141,	-0.008499897646203384,	-0.008549895829318437,	-0.008599893991058752,	-0.008649892131299332,	-0.008699890249915625,	-0.008749888346781748,	
+-0.008799886421773151,	-0.008849884474764837,	-0.008899882505632256,	-0.008949880514249525,	-0.008999878500492093,	-0.009049876464234965,	-0.009099874405353590,	-0.009149872323722084,	
+-0.009199870219215898,	-0.009249868091710479,	-0.009299865941079948,	-0.009349863767199750,	-0.009399861569944894,	-0.009449859349190827,	-0.009499857104811669,	-0.009549854836682867,	
+-0.009599852544679429,	-0.009649850228676803,	-0.009699847888549109,	-0.009749845524171793,	-0.009799843135419864,	-0.009849840722168771,	-0.009899838284292632,	-0.009949835821666898,	
+-0.009999833334166574,	-0.010049830821667110,	-0.010099828284042626,	-0.010149825721168572,	-0.010199823132920397,	-0.010249820519172219,	-0.010299817879799491,	-0.010349815214677217,	
+-0.010399812523680850,	-0.010449809806684508,	-0.010499807063563642,	-0.010549804294193258,	-0.010599801498448806,	-0.010649798676204407,	-0.010699795827335511,	-0.010749792951717126,	
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